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From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 16 Jun 2017 11:24:33 +0200
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Subject: Re: [PATCH v3 6/9] pinctrl: mvebu: add driver for Armada CP110 pinctrl
To: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        Russell King <rmk+kernel@armlinux.org.uk>,
        Nadav Haklai <nadavh@marvell.com>,
        Kostya Porotchkin <kostap@marvell.com>,
        Neta Zur Hershkovits <neta@marvell.com>,
        Marcin Wojtas <mw@semihalf.com>, Omri Itach <omrii@marvell.com>,
        Shadi Ammouri <shadi@marvell.com>, Hanna Hawa <hannah@marvell.com>,
        Grzegorz Jaszczyk <jaz@semihalf.com>
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On Mon, Jun 12, 2017 at 5:34 PM, Gregory CLEMENT
<gregory.clement@free-electrons.com> wrote:

> From: Hanna Hawa <hannah@marvell.com>
>
> This commit adds a pinctrl driver for the CP110 part of the Marvell
> Armada 7K and 8K SoCs. The Armada 7K has a single CP110, where almost all
> the MPP pins are available. On the other side, the Armada 8K has two
> CP110, and the available MPPs are split between the master CP110 (MPPs 32
> to 62) and the slave CP110 (MPPs 0 to 31).
>
> The register interface to control the MPPs is however the same as all
> other mvebu SoCs, so we can reuse the common pinctrl-mvebu.c logic.
>
> Signed-off-by: Hanna Hawa <hannah@marvell.com>
> Reviewed-by: Shadi Ammouri <shadi@marvell.com>

Patch applied.

Yours,
Linus Walleij