[PATCH v3 1/4] pinctrl: amd: fix incorrect way to disable debounce filter

[PATCH v3 1/4] pinctrl: amd: fix incorrect way to disable debounce filter

[Coiby Xu]

The correct way to disable debounce filter is to clear bit 5 and 6
of the register.

Cc: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/linux-gpio/df2c008b-e7b5-4fdd-42ea-4d1c62b52139@redhat.com/
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
---
 drivers/pinctrl/pinctrl-amd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 9a760f5cd7ed..d6b2b4bd337c 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -166,14 +166,14 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
 			pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
 			pin_reg |= BIT(DB_TMR_LARGE_OFF);
 		} else {
-			pin_reg &= ~DB_CNTRl_MASK;
+			pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
 			ret = -EINVAL;
 		}
 	} else {
 		pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
 		pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
 		pin_reg &= ~DB_TMR_OUT_MASK;
-		pin_reg &= ~DB_CNTRl_MASK;
+		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
 	}
 	writel(pin_reg, gpio_dev->base + offset * 4);
 	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
-- 
2.28.0

[PATCH v3 2/4] pinctrl: amd: use higher precision for 512 RtcClk

[Coiby Xu]

RTC is 32.768kHz thus 512 RtcClk equals 15625 usec. The documentation
likely has dropped precision and that's why the driver mistakenly took
the slightly deviated value.

Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/linux-gpio/2f4706a1-502f-75f0-9596-cc25b4933b6c@redhat.com/
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
---
 drivers/pinctrl/pinctrl-amd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index d6b2b4bd337c..4aea3e05e8c6 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -156,7 +156,7 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
 			pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
 			pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
 		} else if (debounce < 250000) {
-			time = debounce / 15600;
+			time = debounce / 15625;
 			pin_reg |= time & DB_TMR_OUT_MASK;
 			pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
 			pin_reg |= BIT(DB_TMR_LARGE_OFF);
-- 
2.28.0

[PATCH v3 3/4] pinctrl: amd: print debounce filter info in debugfs

[Coiby Xu]

Print the status of debounce filter as follows,
$ cat /sys/kernel/debug/gpio
pin129          interrupt is disabled| interrupt is masked| disable wakeup in S0i3 state| disable wakeup in S3 state|
 disable wakeup in S4/S5 state| input is high|   pull-up is disabled| Pull-down is disabled|   output is disabled| debouncing filter disabled|   0x50000
                                                                                                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^
pin130          interrupt is disabled| interrupt is masked| disable wakeup in S0i3 state| disable wakeup in S3 state|
 disable wakeup in S4/S5 state| input is high|   pull-up is disabled| Pull-down is disabled|   output is disabled| debouncing filter (high) enabled| debouncing timeout is 124800 (us)| 0x503c8
                                                                                                                  ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
---
 drivers/pinctrl/pinctrl-amd.c | 43 +++++++++++++++++++++++++++++++++--
 1 file changed, 41 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 4aea3e05e8c6..e9b761c2b77a 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -197,10 +197,16 @@ static int amd_gpio_set_config(struct gpio_chip *gc, unsigned offset,
 static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
 {
 	u32 pin_reg;
+	u32 db_cntrl;
 	unsigned long flags;
 	unsigned int bank, i, pin_num;
 	struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
 
+	bool tmr_out_unit;
+	unsigned int time;
+	unsigned int unit;
+	bool tmr_large;
+
 	char *level_trig;
 	char *active_level;
 	char *interrupt_enable;
@@ -214,6 +220,8 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
 	char *pull_down_enable;
 	char *output_value;
 	char *output_enable;
+	char debounce_value[40];
+	char *debounce_enable;
 
 	for (bank = 0; bank < gpio_dev->hwbank_num; bank++) {
 		seq_printf(s, "GPIO bank%d\t", bank);
@@ -327,13 +335,44 @@ static void amd_gpio_dbg_show(struct seq_file *s, struct gpio_chip *gc)
 					pin_sts = "input is low|";
 			}
 
+			db_cntrl = (DB_CNTRl_MASK << DB_CNTRL_OFF) & pin_reg;
+			if (db_cntrl) {
+				tmr_out_unit = pin_reg & BIT(DB_TMR_OUT_UNIT_OFF);
+				tmr_large = pin_reg & BIT(DB_TMR_LARGE_OFF);
+				time = pin_reg & DB_TMR_OUT_MASK;
+				if (tmr_large) {
+					if (tmr_out_unit)
+						unit = 62500;
+					else
+						unit = 15625;
+				} else {
+					if (tmr_out_unit)
+						unit = 244;
+					else
+						unit = 61;
+				}
+				if ((DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF) == db_cntrl)
+					debounce_enable = "debouncing filter (high and low) enabled|";
+				else if ((DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF) == db_cntrl)
+					debounce_enable = "debouncing filter (low) enabled|";
+				else
+					debounce_enable = "debouncing filter (high) enabled|";
+
+				snprintf(debounce_value, sizeof(debounce_value),
+					 "debouncing timeout is %u (us)|", time * unit);
+			} else {
+				debounce_enable = "debouncing filter disabled|";
+				snprintf(debounce_value, sizeof(debounce_value), " ");
+			}
+
 			seq_printf(s, "%s %s %s %s %s %s\n"
-				" %s %s %s %s %s %s %s 0x%x\n",
+				" %s %s %s %s %s %s %s %s %s 0x%x\n",
 				level_trig, active_level, interrupt_enable,
 				interrupt_mask, wake_cntrl0, wake_cntrl1,
 				wake_cntrl2, pin_sts, pull_up_sel,
 				pull_up_enable, pull_down_enable,
-				output_value, output_enable, pin_reg);
+				output_value, output_enable,
+				debounce_enable, debounce_value, pin_reg);
 		}
 	}
 }
-- 
2.28.0

[PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting

[Coiby Xu]

Debounce filter setting should be independent from IRQ type setting
because according to the ACPI specs, there are separate arguments for
specifying debounce timeout and IRQ type in GpioIo() and GpioInt().

This will fix broken touchpads for laptops whose BIOS set the debounce
timeout to a relatively large value. For example, the BIOS of Lenovo
Legion-5 AMD gaming laptops including 15ARH05 (R7000) and R7000P set
the debounce timeout to 124.8ms. This led to the kernel receiving only
~7 HID reports per second from the Synaptics touchpad
(MSFT0001:00 06CB:7F28). Existing touchpads like [1][2] are not troubled
by this bug because the debounce timeout has been set to 0 by the BIOS
before enabling the debounce filter in setting IRQ type.

[1] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582
[2] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28

Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Cc: stable@vger.kernel.org
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190
Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
---
 drivers/pinctrl/pinctrl-amd.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index e9b761c2b77a..2d4acf21117c 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -468,7 +468,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
 		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
 		pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
-		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
 		irq_set_handler_locked(d, handle_edge_irq);
 		break;
 
@@ -476,7 +475,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
 		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
 		pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
-		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
 		irq_set_handler_locked(d, handle_edge_irq);
 		break;
 
@@ -484,7 +482,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
 		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
 		pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
-		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
 		irq_set_handler_locked(d, handle_edge_irq);
 		break;
 
@@ -492,8 +489,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 		pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
 		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
 		pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
-		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
-		pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
 		irq_set_handler_locked(d, handle_level_irq);
 		break;
 
@@ -501,8 +496,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 		pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
 		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
 		pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
-		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
-		pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
 		irq_set_handler_locked(d, handle_level_irq);
 		break;
 
-- 
2.28.0

Re: [PATCH v3 1/4] pinctrl: amd: fix incorrect way to disable debounce filter

[Hans de Goede]

Hi,

On 11/6/20 12:19 AM, Coiby Xu wrote:
> The correct way to disable debounce filter is to clear bit 5 and 6
> of the register.
> 
> Cc: Hans de Goede <hdegoede@redhat.com>
> Link: https://lore.kernel.org/linux-gpio/df2c008b-e7b5-4fdd-42ea-4d1c62b52139@redhat.com/
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

Thanks, patch looks good to me:

Reviewed-by: Hans de Goede <hdegoede@redhat.com>

Regards,

Hans

> ---
>  drivers/pinctrl/pinctrl-amd.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index 9a760f5cd7ed..d6b2b4bd337c 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -166,14 +166,14 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
>  			pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
>  			pin_reg |= BIT(DB_TMR_LARGE_OFF);
>  		} else {
> -			pin_reg &= ~DB_CNTRl_MASK;
> +			pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
>  			ret = -EINVAL;
>  		}
>  	} else {
>  		pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
>  		pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
>  		pin_reg &= ~DB_TMR_OUT_MASK;
> -		pin_reg &= ~DB_CNTRl_MASK;
> +		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
>  	}
>  	writel(pin_reg, gpio_dev->base + offset * 4);
>  	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
> 

Re: [PATCH v3 2/4] pinctrl: amd: use higher precision for 512 RtcClk

[Hans de Goede]

Hi,

On 11/6/20 12:19 AM, Coiby Xu wrote:
> RTC is 32.768kHz thus 512 RtcClk equals 15625 usec. The documentation
> likely has dropped precision and that's why the driver mistakenly took
> the slightly deviated value.
> 
> Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Suggested-by: Hans de Goede <hdegoede@redhat.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Link: https://lore.kernel.org/linux-gpio/2f4706a1-502f-75f0-9596-cc25b4933b6c@redhat.com/
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

Thanks, patch looks good to me:

Reviewed-by: Hans de Goede <hdegoede@redhat.com>

Regards,

Hans


> ---
>  drivers/pinctrl/pinctrl-amd.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index d6b2b4bd337c..4aea3e05e8c6 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -156,7 +156,7 @@ static int amd_gpio_set_debounce(struct gpio_chip *gc, unsigned offset,
>  			pin_reg |= BIT(DB_TMR_OUT_UNIT_OFF);
>  			pin_reg &= ~BIT(DB_TMR_LARGE_OFF);
>  		} else if (debounce < 250000) {
> -			time = debounce / 15600;
> +			time = debounce / 15625;
>  			pin_reg |= time & DB_TMR_OUT_MASK;
>  			pin_reg &= ~BIT(DB_TMR_OUT_UNIT_OFF);
>  			pin_reg |= BIT(DB_TMR_LARGE_OFF);
> 

Re: [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting

[Hans de Goede]

Hi,

On 11/6/20 12:19 AM, Coiby Xu wrote:
> Debounce filter setting should be independent from IRQ type setting
> because according to the ACPI specs, there are separate arguments for
> specifying debounce timeout and IRQ type in GpioIo() and GpioInt().
> 
> This will fix broken touchpads for laptops whose BIOS set the debounce
> timeout to a relatively large value. For example, the BIOS of Lenovo
> Legion-5 AMD gaming laptops including 15ARH05 (R7000) and R7000P set
> the debounce timeout to 124.8ms. This led to the kernel receiving only
> ~7 HID reports per second from the Synaptics touchpad
> (MSFT0001:00 06CB:7F28). Existing touchpads like [1][2] are not troubled
> by this bug because the debounce timeout has been set to 0 by the BIOS
> before enabling the debounce filter in setting IRQ type.
> 
> [1] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582
> [2] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28
> 
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
> Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
> Cc: stable@vger.kernel.org
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190
> Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

I'm not entirely sure about this patch. This is consistent with how we
already stopped touching the debounce timeout setting during init, so
that speaks in favor of this change.

Still I'm worried a bit that this might have undesirable side effects.

I guess this should be landed together with Andy's series to apply
the debounce setting from the ACPI GPIO resources.

Regards,

Hans




> ---
>  drivers/pinctrl/pinctrl-amd.c | 7 -------
>  1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
> index e9b761c2b77a..2d4acf21117c 100644
> --- a/drivers/pinctrl/pinctrl-amd.c
> +++ b/drivers/pinctrl/pinctrl-amd.c
> @@ -468,7 +468,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>  		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>  		pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
> -		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>  		irq_set_handler_locked(d, handle_edge_irq);
>  		break;
>  
> @@ -476,7 +475,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>  		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>  		pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
> -		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>  		irq_set_handler_locked(d, handle_edge_irq);
>  		break;
>  
> @@ -484,7 +482,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>  		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>  		pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
> -		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>  		irq_set_handler_locked(d, handle_edge_irq);
>  		break;
>  
> @@ -492,8 +489,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>  		pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>  		pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
> -		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
> -		pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
>  		irq_set_handler_locked(d, handle_level_irq);
>  		break;
>  
> @@ -501,8 +496,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>  		pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>  		pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
> -		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
> -		pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
>  		irq_set_handler_locked(d, handle_level_irq);
>  		break;
>  
> 

Re: [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting

[Coiby Xu]

On Mon, Nov 09, 2020 at 02:52:17PM +0100, Hans de Goede wrote:
>Hi,
>
>On 11/6/20 12:19 AM, Coiby Xu wrote:
>> Debounce filter setting should be independent from IRQ type setting
>> because according to the ACPI specs, there are separate arguments for
>> specifying debounce timeout and IRQ type in GpioIo() and GpioInt().
>>
>> This will fix broken touchpads for laptops whose BIOS set the debounce
>> timeout to a relatively large value. For example, the BIOS of Lenovo
>> Legion-5 AMD gaming laptops including 15ARH05 (R7000) and R7000P set
>> the debounce timeout to 124.8ms. This led to the kernel receiving only
>> ~7 HID reports per second from the Synaptics touchpad
>> (MSFT0001:00 06CB:7F28). Existing touchpads like [1][2] are not troubled
>> by this bug because the debounce timeout has been set to 0 by the BIOS
>> before enabling the debounce filter in setting IRQ type.
>>
>> [1] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582
>> [2] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28
>>
>> Cc: Hans de Goede <hdegoede@redhat.com>
>> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
>> Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
>> Cc: stable@vger.kernel.org
>> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
>> BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190
>> Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/
>> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
>
>I'm not entirely sure about this patch. This is consistent with how we
>already stopped touching the debounce timeout setting during init, so
>that speaks in favor of this change.
>
>Still I'm worried a bit that this might have undesirable side effects.
>
Now I can only confirm this patch won't affect the mentioned touchpads.
I'll see if other distributions like Manjaro are willing to test it
through the unstable channel.

>I guess this should be landed together with Andy's series to apply
>the debounce setting from the ACPI GPIO resources.

Thank you for the reminding! You are right, Andy's patch
"gpiolib: acpi: Take into account debounce settings" is needed to
fix this kind of touchpad issues. Since that patch hasn't been
merged, is there a way to refer to it in the commit message?
>
>Regards,
>
>Hans
>
>
>
>
>> ---
>>  drivers/pinctrl/pinctrl-amd.c | 7 -------
>>  1 file changed, 7 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
>> index e9b761c2b77a..2d4acf21117c 100644
>> --- a/drivers/pinctrl/pinctrl-amd.c
>> +++ b/drivers/pinctrl/pinctrl-amd.c
>> @@ -468,7 +468,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>  		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>  		pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
>> -		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>>  		irq_set_handler_locked(d, handle_edge_irq);
>>  		break;
>>
>> @@ -476,7 +475,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>  		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>  		pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
>> -		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>>  		irq_set_handler_locked(d, handle_edge_irq);
>>  		break;
>>
>> @@ -484,7 +482,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>  		pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>  		pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
>> -		pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>>  		irq_set_handler_locked(d, handle_edge_irq);
>>  		break;
>>
>> @@ -492,8 +489,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>  		pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>  		pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
>> -		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
>> -		pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
>>  		irq_set_handler_locked(d, handle_level_irq);
>>  		break;
>>
>> @@ -501,8 +496,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>  		pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>>  		pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>  		pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
>> -		pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
>> -		pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
>>  		irq_set_handler_locked(d, handle_level_irq);
>>  		break;
>>
>>
>

--
Best regards,
Coiby

Re: [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting

[Hans de Goede]

Hi,

On 11/10/20 9:26 AM, Coiby Xu wrote:
> On Mon, Nov 09, 2020 at 02:52:17PM +0100, Hans de Goede wrote:
>> Hi,
>>
>> On 11/6/20 12:19 AM, Coiby Xu wrote:
>>> Debounce filter setting should be independent from IRQ type setting
>>> because according to the ACPI specs, there are separate arguments for
>>> specifying debounce timeout and IRQ type in GpioIo() and GpioInt().
>>>
>>> This will fix broken touchpads for laptops whose BIOS set the debounce
>>> timeout to a relatively large value. For example, the BIOS of Lenovo
>>> Legion-5 AMD gaming laptops including 15ARH05 (R7000) and R7000P set
>>> the debounce timeout to 124.8ms. This led to the kernel receiving only
>>> ~7 HID reports per second from the Synaptics touchpad
>>> (MSFT0001:00 06CB:7F28). Existing touchpads like [1][2] are not troubled
>>> by this bug because the debounce timeout has been set to 0 by the BIOS
>>> before enabling the debounce filter in setting IRQ type.
>>>
>>> [1] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582
>>> [2] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28
>>>
>>> Cc: Hans de Goede <hdegoede@redhat.com>
>>> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
>>> Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
>>> Cc: stable@vger.kernel.org
>>> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
>>> BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190
>>> Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/
>>> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
>>
>> I'm not entirely sure about this patch. This is consistent with how we
>> already stopped touching the debounce timeout setting during init, so
>> that speaks in favor of this change.
>>
>> Still I'm worried a bit that this might have undesirable side effects.
>>
> Now I can only confirm this patch won't affect the mentioned touchpads.
> I'll see if other distributions like Manjaro are willing to test it
> through the unstable channel.
> 
>> I guess this should be landed together with Andy's series to apply
>> the debounce setting from the ACPI GPIO resources.
> 
> Thank you for the reminding! You are right, Andy's patch
> "gpiolib: acpi: Take into account debounce settings" is needed to
> fix this kind of touchpad issues. Since that patch hasn't been
> merged, is there a way to refer to it in the commit message?

You can always refer to it by subject, as you did above.

Regards,

Hans



>>> ---
>>>  drivers/pinctrl/pinctrl-amd.c | 7 -------
>>>  1 file changed, 7 deletions(-)
>>>
>>> diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
>>> index e9b761c2b77a..2d4acf21117c 100644
>>> --- a/drivers/pinctrl/pinctrl-amd.c
>>> +++ b/drivers/pinctrl/pinctrl-amd.c
>>> @@ -468,7 +468,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>>          pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>>          pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
>>> -        pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>>>          irq_set_handler_locked(d, handle_edge_irq);
>>>          break;
>>>
>>> @@ -476,7 +475,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>>          pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>>          pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
>>> -        pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>>>          irq_set_handler_locked(d, handle_edge_irq);
>>>          break;
>>>
>>> @@ -484,7 +482,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>>          pin_reg &= ~BIT(LEVEL_TRIG_OFF);
>>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>>          pin_reg |= BOTH_EADGE << ACTIVE_LEVEL_OFF;
>>> -        pin_reg |= DB_TYPE_REMOVE_GLITCH << DB_CNTRL_OFF;
>>>          irq_set_handler_locked(d, handle_edge_irq);
>>>          break;
>>>
>>> @@ -492,8 +489,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>>          pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>>          pin_reg |= ACTIVE_HIGH << ACTIVE_LEVEL_OFF;
>>> -        pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
>>> -        pin_reg |= DB_TYPE_PRESERVE_LOW_GLITCH << DB_CNTRL_OFF;
>>>          irq_set_handler_locked(d, handle_level_irq);
>>>          break;
>>>
>>> @@ -501,8 +496,6 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
>>>          pin_reg |= LEVEL_TRIGGER << LEVEL_TRIG_OFF;
>>>          pin_reg &= ~(ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
>>>          pin_reg |= ACTIVE_LOW << ACTIVE_LEVEL_OFF;
>>> -        pin_reg &= ~(DB_CNTRl_MASK << DB_CNTRL_OFF);
>>> -        pin_reg |= DB_TYPE_PRESERVE_HIGH_GLITCH << DB_CNTRL_OFF;
>>>          irq_set_handler_locked(d, handle_level_irq);
>>>          break;
>>>
>>>
>>
> 
> -- 
> Best regards,
> Coiby
> 

Re: [PATCH v3 1/4] pinctrl: amd: fix incorrect way to disable debounce filter

[Linus Walleij]

On Fri, Nov 6, 2020 at 12:19 AM Coiby Xu <coiby.xu@gmail.com> wrote:

> The correct way to disable debounce filter is to clear bit 5 and 6
> of the register.
>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Link: https://lore.kernel.org/linux-gpio/df2c008b-e7b5-4fdd-42ea-4d1c62b52139@redhat.com/
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

This patch applied for fixes and tagged for stable.

Yours,
Linus Walleij

Re: [PATCH v3 2/4] pinctrl: amd: use higher precision for 512 RtcClk

[Linus Walleij]

On Fri, Nov 6, 2020 at 12:19 AM Coiby Xu <coiby.xu@gmail.com> wrote:

> RTC is 32.768kHz thus 512 RtcClk equals 15625 usec. The documentation
> likely has dropped precision and that's why the driver mistakenly took
> the slightly deviated value.
>
> Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Suggested-by: Hans de Goede <hdegoede@redhat.com>
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Link: https://lore.kernel.org/linux-gpio/2f4706a1-502f-75f0-9596-cc25b4933b6c@redhat.com/
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

This patch applied for fixes and tagged for stable.

Yours,
Linus Walleij

Re: [PATCH v3 3/4] pinctrl: amd: print debounce filter info in debugfs

[Linus Walleij]

On Fri, Nov 6, 2020 at 12:19 AM Coiby Xu <coiby.xu@gmail.com> wrote:

> Print the status of debounce filter as follows,
> $ cat /sys/kernel/debug/gpio
> pin129          interrupt is disabled| interrupt is masked| disable wakeup in S0i3 state| disable wakeup in S3 state|
>  disable wakeup in S4/S5 state| input is high|   pull-up is disabled| Pull-down is disabled|   output is disabled| debouncing filter disabled|   0x50000
>                                                                                                                    ^^^^^^^^^^^^^^^^^^^^^^^^^^
> pin130          interrupt is disabled| interrupt is masked| disable wakeup in S0i3 state| disable wakeup in S3 state|
>  disable wakeup in S4/S5 state| input is high|   pull-up is disabled| Pull-down is disabled|   output is disabled| debouncing filter (high) enabled| debouncing timeout is 124800 (us)| 0x503c8
>                                                                                                                   ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

Patch applied for the next kernel (v5.11).

Yours,
Linus Walleij

Re: [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting

[Linus Walleij]

On Fri, Nov 6, 2020 at 12:19 AM Coiby Xu <coiby.xu@gmail.com> wrote:

> Debounce filter setting should be independent from IRQ type setting
> because according to the ACPI specs, there are separate arguments for
> specifying debounce timeout and IRQ type in GpioIo() and GpioInt().
>
> This will fix broken touchpads for laptops whose BIOS set the debounce
> timeout to a relatively large value. For example, the BIOS of Lenovo
> Legion-5 AMD gaming laptops including 15ARH05 (R7000) and R7000P set
> the debounce timeout to 124.8ms. This led to the kernel receiving only
> ~7 HID reports per second from the Synaptics touchpad
> (MSFT0001:00 06CB:7F28). Existing touchpads like [1][2] are not troubled
> by this bug because the debounce timeout has been set to 0 by the BIOS
> before enabling the debounce filter in setting IRQ type.
>
> [1] https://github.com/Syniurge/i2c-amd-mp2/issues/11#issuecomment-721331582
> [2] https://forum.manjaro.org/t/random-short-touchpad-freezes/30832/28
>
> Cc: Hans de Goede <hdegoede@redhat.com>
> Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
> Cc: Benjamin Tissoires <benjamin.tissoires@redhat.com>
> Cc: stable@vger.kernel.org
> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> BugLink: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1887190
> Link: https://lore.kernel.org/linux-gpio/CAHp75VcwiGREBUJ0A06EEw-SyabqYsp%2Bdqs2DpSrhaY-2GVdAA%40mail.gmail.com/
> Signed-off-by: Coiby Xu <coiby.xu@gmail.com>

As I have applied patches 1-3 we only have this one to land.

If Andy or someone else needs to take it through the ACPI
tree you can add my:
Acked-by: Linus Walleij <linus.walleij@linaro.org>

If I should apply it or if Andy sends me a pull request, just
ping me and tell me what to do :)

Yours,
Linus Walleij

Re: [PATCH v3 4/4] pinctrl: amd: remove debounce filter setting in IRQ type setting

[Andy Shevchenko]

On Tue, Nov 10, 2020 at 3:23 PM Linus Walleij <linus.walleij@linaro.org> wrote:
> On Fri, Nov 6, 2020 at 12:19 AM Coiby Xu <coiby.xu@gmail.com> wrote:

...

> If Andy or someone else needs to take it through the ACPI
> tree you can add my:
> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>
> If I should apply it or if Andy sends me a pull request, just
> ping me and tell me what to do :)

I can take it, but I would need few things:
- Hans' blessing of my series
- tested on top of my series (hence tested-by tag for my series)
- I would like to perform more tests myself


-- 
With Best Regards,
Andy Shevchenko