From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754096AbcG2U7d (ORCPT ); Fri, 29 Jul 2016 16:59:33 -0400 Received: from mail-oi0-f52.google.com ([209.85.218.52]:34464 "EHLO mail-oi0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752937AbcG2U7U convert rfc822-to-8bit (ORCPT ); Fri, 29 Jul 2016 16:59:20 -0400 MIME-Version: 1.0 In-Reply-To: <23e2aa2f-a0ff-f72e-5e98-ea539c6fb69d@gmail.com> References: <1469797120-29298-1-git-send-email-zajec5@gmail.com> <1e7e8319-d6d5-d952-634d-1ee9b9f2b1a3@broadcom.com> <23e2aa2f-a0ff-f72e-5e98-ea539c6fb69d@gmail.com> From: =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= Date: Fri, 29 Jul 2016 22:59:18 +0200 Message-ID: Subject: Re: [PATCH] clk: bcm: Add driver for Northstar ILP clock To: Florian Fainelli Cc: Ray Jui , Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, bcm-kernel-feedback-list , =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Jon Mason , Eric Anholt , Stephen Warren , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29 July 2016 at 22:55, Florian Fainelli wrote: > On 07/29/2016 01:52 PM, Rafał Miłecki wrote: >> On 29 July 2016 at 22:49, Ray Jui wrote: >>> On 7/29/2016 1:46 PM, Rafał Miłecki wrote: >>>> On 29 July 2016 at 22:44, Ray Jui wrote: >>>>> >>>>> On 7/29/2016 5:58 AM, Rafał Miłecki wrote: >>>>>> >>>>>> >>>>>> From: Rafał Miłecki >>>>>> >>>>>> This clock is present on cheaper Northstar devices like BCM53573 or >>>>>> BCM47189 using Corex-A7. This driver uses PMU (Power Management Unit) >>>>>> to calculate clock rate and allows using it in a generic (clk_*) way. >>>>>> >>>>> >>>>> I thought Northstar uses Cortex A9 instead of A7? >>>> >>>> >>>> [ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), >>>> cr=10c5387d >>>> [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing >>>> instruction cache >>>> [ 0.000000] Machine model: Tenda AC9 >>>> >>> >>> Yeah ARMv7 instruction set but the core is Cortex A7. Both Cortex A7 and A9 >>> use ARMv7 instructions. >> >> OK, sorry for irrelevant part then :) >> >> This is from BCM4709C0: >> bcma: bus0: Core 10 found: ARM Cortex A9 core (ihost) (manuf 0x4BF, id >> 0x510, rev 0x07, class 0x0) >> >> This is from BCM47189B0:: >> bcma: bus0: Core 3 found: ARM CA7 (manuf 0x4BF, id 0x847, rev 0x00, class 0x0) >> > > This is indeed a Cortex A7-based chip, not clear if putting this chip in > the Northstar family is accurate here because it really seems to have a > different architecture from the NS/NSP family here... Broadcom claims it is a Northstar, at least according to their SDKs: Asus RT-AC1200G+ # cat /proc/cpuinfo Processor : ARMv7 Processor rev 5 (v7l) BogoMIPS : 1795.68 Features : swp half thumb fastmult edsp CPU implementer : 0x41 CPU architecture: 7 CPU variant : 0x0 CPU part : 0xc07 CPU revision : 5 Hardware : Northstar Prototype Revision : 0000 Serial : 0000000000000000 -- Rafał