From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1752639AbbCJCrL (ORCPT <rfc822;w@1wt.eu>);
	Mon, 9 Mar 2015 22:47:11 -0400
Received: from mail-wi0-f175.google.com ([209.85.212.175]:43406 "EHLO
	mail-wi0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
	with ESMTP id S1750933AbbCJCrH (ORCPT
	<rfc822;linux-kernel@vger.kernel.org>);
	Mon, 9 Mar 2015 22:47:07 -0400
MIME-Version: 1.0
In-Reply-To: <1425913502.3838.185.camel@linux.intel.com>
References: <54F96F5B.2090601@huawei.com>
	<54F9DACA.3020103@hurleysoftware.com>
	<CAD7vxxJXEz8KfXd9fBjkxTi5Nnjyw0=wwvbw5qCSwCMbBd64eA@mail.gmail.com>
	<54FD4779.3020902@huawei.com>
	<1425907939.3838.182.camel@linux.intel.com>
	<CAD7vxxJvL61BjD9AMBF34Y8xnY+D-umuWLUq8Dh7ZbSm5tCE9w@mail.gmail.com>
	<1425913502.3838.185.camel@linux.intel.com>
Date: Mon, 9 Mar 2015 19:47:06 -0700
Message-ID: <CAD7vxx+WYgOujpTAxXsUmcr8T4zHS9MYfwrWu8hV2t=TudLamQ@mail.gmail.com>
Subject: Re: [RFC] With 8250 Designware UART, if writes to the LCR failed the
 kernel will hung up
From: Tim Kryger <tim.kryger@gmail.com>
To: Alan Cox <alan@linux.intel.com>
Cc: "long.wanglong" <long.wanglong@huawei.com>,
        Peter Hurley <peter@hurleysoftware.com>,
        Zhang Zhen <zhenzhang.zhang@huawei.com>, linux-serial@vger.kernel.org,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        gregkh@linuxfoundation.org, Jamie Iles <jamie@jamieiles.com>,
        Arnd Bergmann <arnd@arndb.de>, shenjiangjiang@huawei.com,
        Wang Kai <morgan.wang@huawei.com>
Content-Type: text/plain; charset=UTF-8
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Mon, Mar 9, 2015 at 8:05 AM, Alan Cox <alan@linux.intel.com> wrote:

> Ah no - I meant what is their official software workaround for existing
> parts with the bug ? Presumably they have an errata document that
> discusses this and the correct methods they recommend to avoid the
> hang ?

As far as I know, the only advice they provided was rather naive.

The documentation I saw suggested stashing a copy of the LCR and then
rewriting it when the special LCR write failed interrupt was raised.

That approach was not workable as the LCR might be written while the
interrupt is masked causing the sequence of register writes to occur
in an order other than what was desired.

Additionally, when the LCR needed to be re-written but the UART stayed
busy, the interrupt would keep firing and the driver would starve out
everything else on the CPU.

The current workaround of clearing fifos and retrying a fixed number
of times isn't ideal but I'm not sure what else can be done given the
way this hardware works.

Additional background is in c49436b657d0a56a6ad90d14a7c3041add7cf64d

-Tim