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[209.85.222.44]) by smtp.gmail.com with ESMTPSA id n15sm5761455vsi.5.2018.12.17.15.59.59 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 17 Dec 2018 15:59:59 -0800 (PST) Received: by mail-ua1-f44.google.com with SMTP id p9so5094883uaa.5 for ; Mon, 17 Dec 2018 15:59:59 -0800 (PST) X-Received: by 2002:ab0:1c12:: with SMTP id a18mr6799230uaj.15.1545091198708; Mon, 17 Dec 2018 15:59:58 -0800 (PST) MIME-Version: 1.0 References: <20181217100724.4593-1-sibis@codeaurora.org> <20181217100724.4593-2-sibis@codeaurora.org> In-Reply-To: <20181217100724.4593-2-sibis@codeaurora.org> From: Doug Anderson Date: Mon, 17 Dec 2018 15:59:47 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 2/7] dt-bindings: remoteproc: qcom: Add clock bindings for Q6V5 To: sibis@codeaurora.org Cc: Bjorn Andersson , Rob Herring , Andy Gross , David Brown , linux-arm-msm , "open list:ARM/QUALCOMM SUPPORT" , devicetree@vger.kernel.org, LKML , tsoni@codeaurora.org, clew@codeaurora.org, akdwived@codeaurora.org, Mark Rutland , linux-remoteproc@vger.kernel.org, Evan Green , Brian Norris Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Dec 17, 2018 at 2:07 AM Sibi Sankar wrote: > > Add missing clock bindings for Q6V5 MSS on SDM845 SoCs. > > Signed-off-by: Sibi Sankar > --- > .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 10 +++++++--- > 1 file changed, 7 insertions(+), 3 deletions(-) Fixes: 9f058fa2efb1 ("remoteproc: qcom: Add support for mss remoteproc on msm8996") Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL binding for SDM845") ...it probably doesn't matter too much but if we wanted to be really careful we could split into two patches, one for the msm8996 and one for sdm845. I don't think people care that much about stable backports of bindings though (someone can feel free to correct me)... > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt > index 9ff5b0309417..780adc043b37 100644 > --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt > @@ -39,13 +39,17 @@ on the Qualcomm Hexagon core. > - clocks: > Usage: required > Value type: > - Definition: reference to the iface, bus and mem clocks to be held on > - behalf of the booting of the Hexagon core > + Definition: reference to the list of 4 clocks for the modem sub-system > + reference to the list of 8 clocks for the modem sub-system > + on SDM845 SoCs The above is confusing because you don't list the SoCs that are supposed to use the 4 clocks. How about instead: Definition: reference to the clocks that match clock-names > - clock-names: > Usage: required > Value type: > - Definition: must be "iface", "bus", "mem" > + Definition: must be "iface", "bus", "mem", "xo" for the modem sub-system > + must be "iface", "bus", "mem", "gpll0_mss", "snoc_axi", > + "mnoc_axi", "prng", "xo" for the modem sub-system on SDM845 > + SoCs Same here where it's confusing. ...but also, it it correct? As far as I can tell you're missing msm8996. It's better to just be explicit and list each one, ideally without all the prose. Definition: The clocks needed depend on the compatible string: qcom,sdm845-mss-pil: "xo", "prng", "iface", "snoc_axi", "bus", "mem", "gpll0_mss", "mnoc_axi" qcom,msm8996-mss-pil: "xo", "pnoc", "iface", "bus", "mem", "gpll0_mss_clk" qcom,msm8974-mss-pil: "xo", "iface", "bus", "mem" qcom,msm8916-mss-pil: "xo", "iface", "bus", "mem" qcom,q6v5-pil: "xo", "iface", "bus", "mem" ...as far as I can tell this binding is supposed to account for "qcom,ipq8074-wcss-pil" too but it seems that one doesn't have clock-names. -Doug