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[209.85.222.48]) by smtp.gmail.com with ESMTPSA id f130sm420571vsd.1.2019.02.27.13.03.49 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 27 Feb 2019 13:03:50 -0800 (PST) Received: by mail-ua1-f48.google.com with SMTP id q17so16789448uam.0 for ; Wed, 27 Feb 2019 13:03:49 -0800 (PST) X-Received: by 2002:a9f:3205:: with SMTP id x5mr3132173uad.104.1551301429370; Wed, 27 Feb 2019 13:03:49 -0800 (PST) MIME-Version: 1.0 References: <20190206051335.23799-1-bjorn.andersson@linaro.org> <20190206051335.23799-9-bjorn.andersson@linaro.org> In-Reply-To: From: Doug Anderson Date: Wed, 27 Feb 2019 13:03:38 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v6 8/8] arm64: dts: qcom: sdm845: Add Q6V5 MSS node To: Bjorn Andersson Cc: Andy Gross , David Brown , Rob Herring , Mark Rutland , Arun Kumar Neelakantam , Sibi Sankar , linux-arm-msm , devicetree@vger.kernel.org, LKML , Vivek Gautam , Robin Murphy Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tue, Feb 26, 2019 at 3:54 PM Doug Anderson wrote: > > Hi, > > On Tue, Feb 5, 2019 at 9:13 PM Bjorn Andersson > wrote: > > > > From: Sibi Sankar > > > > This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs. > > > > Signed-off-by: Sibi Sankar > > Reviewed-by: Douglas Anderson > > Signed-off-by: Bjorn Andersson > > --- > > > > Changes since v5: > > - None > > > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 58 ++++++++++++++++++++++++++++ > > 1 file changed, 58 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > index 560c16616ee6..5c41f6fe3e1b 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > @@ -1612,6 +1612,64 @@ > > }; > > }; > > > > + mss_pil: remoteproc@4080000 { > > + compatible = "qcom,sdm845-mss-pil"; > > + reg = <0 0x04080000 0 0x408>, <0 0x04180000 0 0x48>; > > + reg-names = "qdsp6", "rmb"; > > I found that when I disabled IOMMU bypass by booting with > "arm-smmu.disable_bypass=y" that I'd get this failure: > > --- > > [ 13.633776] qcom-q6v5-mss 4080000.remoteproc: MBA booted, loading mpss > [ 13.647694] arm-smmu 15000000.iommu: Unexpected global fault, this > could be serious > [ 13.660278] arm-smmu 15000000.iommu: GFSR 0x80000002, GFSYNR0 > 0x00000000, GFSYNR1 0x00000781, GFSYNR2 0x00000000 > ... > [ 14.648830] qcom-q6v5-mss 4080000.remoteproc: MPSS header > authentication timed out > [ 14.657141] qcom-q6v5-mss 4080000.remoteproc: port failed halt > [ 14.664983] remoteproc remoteproc0: can't start rproc > 4080000.remoteproc: -110 > > --- > > Adding "iommus = <&apps_smmu 0x781 0>;" here fixed my problem. NOTE > that I'm no expert on IOMMUs so you should confirm that this is right, > but if it is then maybe you could include it in the next spin of the > series? I got the "0x781" just by looking at the value of the GFSYNR1 > in the above splat. I wasn't sure what to put for the mask so I put > 0x0. Upon more testing the "iommus" line that I came up with avoids the global fault but doesn't actually work. I just get: qcom-q6v5-mss 4080000.remoteproc: failed to allocate mdt buffer I'm hoping someone from Qualcomm can help out here and say how this should be solved. Thanks! -Doug