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[209.85.166.170]) by smtp.gmail.com with ESMTPSA id g16sm6569543ilr.40.2021.09.07.12.14.21 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Sep 2021 12:14:21 -0700 (PDT) Received: by mail-il1-f170.google.com with SMTP id j15so198153ila.1 for ; Tue, 07 Sep 2021 12:14:21 -0700 (PDT) X-Received: by 2002:a92:6b0a:: with SMTP id g10mr3631557ilc.27.1631042060676; Tue, 07 Sep 2021 12:14:20 -0700 (PDT) MIME-Version: 1.0 References: <1627581885-32165-1-git-send-email-sibis@codeaurora.org> <1627581885-32165-4-git-send-email-sibis@codeaurora.org> In-Reply-To: From: Doug Anderson Date: Tue, 7 Sep 2021 12:14:08 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 3/4] arm64: dts: qcom: sc7280: Fixup the cpufreq node To: Sibi Sankar Cc: Bjorn Andersson , Matthias Kaehlcke , Stephen Boyd , Rob Herring , Viresh Kumar , Andy Gross , "Rafael J. Wysocki" , linux-arm-msm , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , Linux PM , Taniya Das Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Sun, Sep 5, 2021 at 8:20 PM Sibi Sankar wrote: > > On 2021-08-31 22:34, Bjorn Andersson wrote: > > On Tue 31 Aug 08:30 PDT 2021, Matthias Kaehlcke wrote: > > > >> On Thu, Jul 29, 2021 at 11:34:44PM +0530, Sibi Sankar wrote: > >> > Fixup the register regions used by the cpufreq node on SC7280 SoC to > >> > support per core L3 DCVS. > >> > > >> > Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node") > >> > Signed-off-by: Sibi Sankar > >> > >> This patch landed in the Bjorn's tree, however the corresponding > >> driver > >> change ("cpufreq: qcom: Re-arrange register offsets to support per > >> core > >> L3 DCVS" / > >> https://patchwork.kernel.org/project/linux-arm-msm/patch/1627581885-32165-3-git-send-email-sibis@codeaurora.org/) > >> did not land in any maintainer tree yet AFAIK. IIUC the DT change > >> alone > >> breaks cpufreq since the changed register regions require the changed > >> offset in the cpufreq driver. > >> > > > > Thanks for the note Matthias, it must have slipped by as I scraped the > > inbox for things that looked ready. > > > > I'm actually not in favor of splitting these memory blocks in DT to > > facilitate the Linux implementation of splitting that in multiple > > drivers... > > > > But I've not been following up on that discussion. > > > > Regards, > > Bjorn > > > >> Sibi, please confirm or clarify that my concern is unwarranted. > > Let's drop the patch asap as it breaks > SC7280 cpufreq on lnext without the driver > changes. It's already landed so we need a revert: https://lore.kernel.org/r/20210907121220.1.I08460f490473b70de0d768db45f030a4d5c17828@changeid/ -Doug