From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6C18C433DB for ; Tue, 12 Jan 2021 22:18:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A61DC23122 for ; Tue, 12 Jan 2021 22:18:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2438316AbhALWSk (ORCPT ); Tue, 12 Jan 2021 17:18:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730212AbhALWSi (ORCPT ); Tue, 12 Jan 2021 17:18:38 -0500 Received: from mail-ot1-x333.google.com (mail-ot1-x333.google.com [IPv6:2607:f8b0:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B63CC061575 for ; Tue, 12 Jan 2021 14:17:58 -0800 (PST) Received: by mail-ot1-x333.google.com with SMTP id x5so3537465otp.9 for ; Tue, 12 Jan 2021 14:17:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=HvUmJxi/g8blsoQI26oqN2rM0SAy7RtATDDau+9vtBg=; b=V1VvugWsKg02SnRwM/ZoIpIdve/zHjFD0Y4LFtgV4T7KnxkqTyVdld2O6v4RZ78iAg fiXUwKUNVQEKyB7L812A0aIr98YO44lGQ+Mzw35rhaEjqZbi3/v9DwScmxJtZAg3QxvG ImhtGjfecYHIpoiHlNxVMqbasuYx9GUdBIVT1eazYRu8rD1WJv1y5bH2uSJjKss/pzWn +gjZfG3R7f319fSnqQ9NIIyR39nMm2YNC8LzZCMhi1Mg1WO/AuzqloJQUQoM1+4m7GgH 3CY7Tjp4xvW8ZHdZ23vTR5ufQxc6qih4AyWeLZ71m5VpbNXuiUszJwwT+eE2Ci8u/RIk 7BHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=HvUmJxi/g8blsoQI26oqN2rM0SAy7RtATDDau+9vtBg=; b=sN8oBpbpbAbp8RQ5WAD7rxfEdfQ2ZvUYH9pOtiB64wQNcp05x0paLHta97i4YPAskd +tXmSrK64EW633upYhvFucWGHxNniDhcjsqGpQeCTGXk5gr7Lb5z5hGKKCdFnHLhcRNT w2Y+xd9XokP97MA73ftgmknBPvyp9RjbT6rFuevxvBIS5DpzGanwqu5iIBKYrrxaq8fb D8uKB5Hs4o7myvYPxVot18xXadCnZSGaJS0cYykzYVcEH3xR5NZdmxwkluEdJRBoPNUm vhMyWXRAH9yODHVqSGl/BUwo8ea04LOqlgGQ+RsdIjnL7ENWacYuj1YgSEhk1d80Us41 bcOg== X-Gm-Message-State: AOAM532qGfW1hke194tZe/6YbQAHPzaB03kA0EUcKD5saxyMBfLc3gas grQJ1MMEPh0fYmJKdyots2CgRL6qPiIcJ9ssiDoB9dn0 X-Google-Smtp-Source: ABdhPJxGM6vKfRyjIjVJ+tzwpnd5zKmX94O0o8s9X/BqallXC62zfkCYcOvfDzbX7lxCumFm5kKTObterRb+gA1ypmc= X-Received: by 2002:a9d:2ac2:: with SMTP id e60mr1034057otb.23.1610489877610; Tue, 12 Jan 2021 14:17:57 -0800 (PST) MIME-Version: 1.0 References: <20210111191926.3688443-1-lee.jones@linaro.org> <20210111191926.3688443-20-lee.jones@linaro.org> In-Reply-To: <20210111191926.3688443-20-lee.jones@linaro.org> From: Alex Deucher Date: Tue, 12 Jan 2021 17:17:43 -0500 Message-ID: Subject: Re: [PATCH 19/40] drm/amd/display/dc/dce/dce_opp: Remove duplicate entries causing 'field overwritten' issues To: Lee Jones Cc: Leo Li , Mauro Rossi , LKML , amd-gfx list , David Airlie , Maling list - DRI developers , Alex Deucher , =?UTF-8?Q?Christian_K=C3=B6nig?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 11, 2021 at 2:20 PM Lee Jones wrote: > > Fixes the following W=3D1 kernel build warning(s): > > In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dc= e112_resource.c:59: > drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10= 480:62: warning: initialized field overwritten [-Woverride-init] > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in e= xpansion of macro =E2=80=98FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__S= HIFT=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in e= xpansion of macro =E2=80=98OPP_SF=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in e= xpansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:321:2:= note: in expansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_112=E2=80= =99 > drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10= 480:62: note: (near initialization for =E2=80=98opp_shift.FMT_TEMPORAL_DITH= ER_EN=E2=80=99) > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in e= xpansion of macro =E2=80=98FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__S= HIFT=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in e= xpansion of macro =E2=80=98OPP_SF=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in e= xpansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:321:2:= note: in expansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_112=E2=80= =99 > drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10= 479:60: warning: initialized field overwritten [-Woverride-init] > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in e= xpansion of macro =E2=80=98FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MA= SK=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in e= xpansion of macro =E2=80=98OPP_SF=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in e= xpansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce112/dce112_resource.c:325:2:= note: in expansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_112=E2=80= =99 > drivers/gpu/drm/amd/amdgpu/../include/asic_reg/dce/dce_11_2_sh_mask.h:10= 479:60: note: (near initialization for =E2=80=98opp_mask.FMT_TEMPORAL_DITHE= R_EN=E2=80=99) > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:96:16: note: in e= xpansion of macro =E2=80=98FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MA= SK=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:114:2: note: in e= xpansion of macro =E2=80=98OPP_SF=E2=80=99 > drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_opp.h:148:2: note: in e= xpansion of macro =E2=80=98OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE=E2=80=99 > > Cc: Harry Wentland > Cc: Leo Li > Cc: Alex Deucher > Cc: "Christian K=C3=B6nig" > Cc: David Airlie > Cc: Daniel Vetter > Cc: Mauro Rossi > Cc: amd-gfx@lists.freedesktop.org > Cc: dri-devel@lists.freedesktop.org > Signed-off-by: Lee Jones Applied. Thanks! Alex > --- > drivers/gpu/drm/amd/display/dc/dce/dce_opp.h | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h b/drivers/gpu/d= rm/amd/display/dc/dce/dce_opp.h > index 4d484ef60f357..bf1ffc3629c7f 100644 > --- a/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h > +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h > @@ -111,7 +111,6 @@ enum dce110_opp_reg_type { > OPP_SF(FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh),\ > OPP_SF(FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh),\ > OPP_SF(FMT_DITHER_RAND_B_SEED, FMT_RAND_B_SEED, mask_sh),\ > - OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\ > OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_RESET, mask_sh)= ,\ > OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_OFFSET, mask_sh= ),\ > OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_DEPTH, mask_sh)= ,\ > @@ -219,7 +218,6 @@ enum dce110_opp_reg_type { > OPP_SF(FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh),\ > OPP_SF(FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh),\ > OPP_SF(FMT_DITHER_RAND_B_SEED, FMT_RAND_B_SEED, mask_sh),\ > - OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\ > OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_RESET, mask_sh)= ,\ > OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_OFFSET, mask_sh= ),\ > OPP_SF(FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_DEPTH, mask_sh)= ,\ > -- > 2.25.1 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel