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From: Stephen Boyd <swboyd@chromium.org>
To: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>,
	agross@kernel.org, alsa-devel@alsa-project.org,
	bgoswami@codeaurora.org, bjorn.andersson@linaro.org,
	broonie@kernel.org, devicetree@vger.kernel.org,
	judyhsiao@chromium.org, lgirdwood@gmail.com,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	perex@perex.cz, plai@codeaurora.org, robh+dt@kernel.org,
	rohitkr@codeaurora.org, srinivas.kandagatla@linaro.org,
	tiwai@suse.com
Cc: Venkata Prasad Potturu <potturu@codeaurora.org>
Subject: Re: [PATCH 2/3] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl compatible
Date: Thu, 28 Oct 2021 15:22:01 -0700	[thread overview]
Message-ID: <CAE-0n537neZdwb3vP4=8N5vj0EwYnDnA-U7O=fckPvP52baCrg@mail.gmail.com> (raw)
In-Reply-To: <d92c73d1-32b1-8d95-f3b5-ff103b330621@codeaurora.org>

Quoting Srinivasa Rao Mandadapu (2021-10-27 00:47:52)
>
> On 10/7/2021 11:29 PM, Stephen Boyd wrote:
> > Quoting Srinivasa Rao Mandadapu (2021-10-07 06:48:38)
> >> Add device tree binding compatible name for Qualcomm SC7280 LPASS LPI pinctrl driver.
> >>
> >> Signed-off-by: Venkata Prasad Potturu <potturu@codeaurora.org>
> >> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
> >> ---
> >>   Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml | 4 +++-
> >>   1 file changed, 3 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml
> >> index e47ebf9..578b283 100644
> >> --- a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml
> >> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml
> >> @@ -16,7 +16,9 @@ description: |
> >>
> >>   properties:
> >>     compatible:
> >> -    const: qcom,sm8250-lpass-lpi-pinctrl
> >> +    enum:
> >> +      - qcom,sc7280-lpass-lpi-pinctrl
> >> +      - qcom,sm8250-lpass-lpi-pinctrl
> > I suspect we need to split the binding because the function list needs
> > to change. Can you make a whole new file that's probably largely a copy
> > of this file and/or extract the common bits into a meta schema and
> > include that in both the files? Then the function list can be different
> > and the clock property can be omitted in the sc7280 file.
>
> As most are common functions and fixed number of LPASS Lpi pin
> configuration across platforms,
>
> Only diff is ADSP bypass platforms 2 clocks are optional. Otherwise
> clock design also same for SC7280 and SM8250 based architecture.
>
> So I feel Keeping common file is better for now.

I don't agree. We want to be very strict about what is exposed. It needs
to match exactly what is supported on the SoC, not be a superset of it.

  reply	other threads:[~2021-10-28 22:22 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-07 13:48 [PATCH 0/3] Add pin control support for lpass sc7280 Srinivasa Rao Mandadapu
2021-10-07 13:48 ` [PATCH 1/3] pinctrl: qcom: Update lpass variant independent functions as generic Srinivasa Rao Mandadapu
2021-10-07 17:57   ` Stephen Boyd
2021-10-27  7:42     ` Srinivasa Rao Mandadapu
2021-10-07 13:48 ` [PATCH 2/3] dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl compatible Srinivasa Rao Mandadapu
2021-10-07 17:59   ` Stephen Boyd
2021-10-27  7:47     ` Srinivasa Rao Mandadapu
2021-10-28 22:22       ` Stephen Boyd [this message]
2021-10-08  2:46   ` Rob Herring
2021-10-07 13:48 ` [PATCH 3/3] pinctrl: qcom: Add SC7280 lpass pin configuration Srinivasa Rao Mandadapu
2021-10-07 17:54   ` Stephen Boyd
2021-10-27  7:48     ` Srinivasa Rao Mandadapu

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