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* [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn
@ 2012-01-31  7:42 Yinghai Lu
  2012-01-31  7:42 ` [PATCH 01/14] Make %pR could handle bus resource with domain Yinghai Lu
                   ` (14 more replies)
  0 siblings, 15 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

25b9b3c: PCI: Seperate child bus scanning to two passes overall
58fe568: PCI: kill pci_fixup_parent_subordinate_busnr()
72a276a: PCI: Allocate bus range instead of use max blindly
3e65251: PCI: Strict checking of valid range for bridge
a06b7d3: PCI: Probe safe range that we can use for unassigned bridge.
f7d1b3e: PCI: Add pci_bus_extend/shrink_top()
941553d: PCI, parisc: Register busn_res for root buses
44ade6c: PCI, powerpc: Register busn_res for root buses
c96df0d: PCI, ia64: Register busn_res for root buses
370ff8b: PCI, x86: Register busn_res for root buses
12aa505: PCI: Add busn_res tracking in core
5729f35: PCI: Add busn_res operation functions
b7283c2: PCI: Add iobusn_resource
443e84a: Make %pR could handle bus resource with domain

Set up iobusn_resource tree, and register bus number range to it.
Later when need to find bus range, will try to allocate from the tree

Need to test on arches other than x86. esp for ia64 and powerpc that support
  more than on peer root buses.

could be found at:
	git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci-busn-alloc

-v2: according to Jesse, split to more small patches.
-v3: address some request from Bjorn. like make use %pR for busn_res debug print
	out, and move the comment change with code change.

Thanks

Yinghai

 arch/ia64/pci/pci.c              |    2 +
 arch/powerpc/kernel/pci-common.c |    7 +-
 arch/x86/include/asm/topology.h  |    3 +-
 arch/x86/pci/acpi.c              |    8 +-
 arch/x86/pci/bus_numa.c          |    8 +-
 arch/x86/pci/common.c            |   11 +-
 drivers/parisc/dino.c            |    2 +
 drivers/parisc/lba_pci.c         |    3 +
 drivers/pci/probe.c              |  410 ++++++++++++++++++++++++++++++--------
 drivers/pci/remove.c             |    1 +
 include/linux/ioport.h           |    1 +
 include/linux/pci.h              |    8 +
 kernel/resource.c                |    8 +
 lib/vsprintf.c                   |   28 +++-
 14 files changed, 402 insertions(+), 98 deletions(-)

^ permalink raw reply	[flat|nested] 19+ messages in thread

* [PATCH 01/14] Make %pR could handle bus resource with domain
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 02/14] PCI: Add iobusn_resource Yinghai Lu
                   ` (13 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

So could use %pR for busn_res with domain nr in start/end

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 lib/vsprintf.c |   28 ++++++++++++++++++++++++----
 1 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index 8e75003..b34eeea 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -451,6 +451,12 @@ char *resource_string(char *buf, char *end, struct resource *res,
 		.precision = -1,
 		.flags = SPECIAL | SMALL | ZEROPAD,
 	};
+	static const struct printf_spec domain_spec = {
+		.base = 16,
+		.field_width = 4,
+		.precision = -1,
+		.flags = SMALL | ZEROPAD,
+	};
 	static const struct printf_spec bus_spec = {
 		.base = 16,
 		.field_width = 2,
@@ -507,11 +513,25 @@ char *resource_string(char *buf, char *end, struct resource *res,
 		specp = &mem_spec;
 		decode = 0;
 	}
-	p = number(p, pend, res->start, *specp);
-	if (res->start != res->end) {
-		*p++ = '-';
-		p = number(p, pend, res->end, *specp);
+
+	if (res->flags & IORESOURCE_BUS && res->end >> 8) {
+		p = number(p, pend, res->start >> 8, domain_spec);
+		*p++ = ':';
+		p = number(p, pend, res->start & 0xff, *specp);
+		if (res->start != res->end) {
+			*p++ = '-';
+			p = number(p, pend, res->end >> 8, domain_spec);
+			*p++ = ':';
+			p = number(p, pend, res->end & 0xff, *specp);
+		}
+	} else {
+		p = number(p, pend, res->start, *specp);
+		if (res->start != res->end) {
+			*p++ = '-';
+			p = number(p, pend, res->end, *specp);
+		}
 	}
+
 	if (decode) {
 		if (res->flags & IORESOURCE_MEM_64)
 			p = string(p, pend, " 64bit", str_spec);
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 02/14] PCI: Add iobusn_resource
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
  2012-01-31  7:42 ` [PATCH 01/14] Make %pR could handle bus resource with domain Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 03/14] PCI: Add busn_res operation functions Yinghai Lu
                   ` (12 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

also add busn_res into struct pci_bus.

will use them to have bus number resource tree.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 include/linux/ioport.h |    1 +
 include/linux/pci.h    |    1 +
 kernel/resource.c      |    8 ++++++++
 3 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index e885ba2..6fe9e19 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -136,6 +136,7 @@ struct resource {
 /* PC/ISA/whatever - the normal PC address spaces: IO and memory */
 extern struct resource ioport_resource;
 extern struct resource iomem_resource;
+extern struct resource iobusn_resource;
 
 extern struct resource *request_resource_conflict(struct resource *root, struct resource *new);
 extern int request_resource(struct resource *root, struct resource *new);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index f8caaab..94ad468 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -419,6 +419,7 @@ struct pci_bus {
 	struct list_head slots;		/* list of slots on this bus */
 	struct resource *resource[PCI_BRIDGE_RESOURCE_NUM];
 	struct list_head resources;	/* address space routed to this bus */
+	struct resource busn_res;	/* track registered bus num range */
 
 	struct pci_ops	*ops;		/* configuration access functions */
 	void		*sysdata;	/* hook for sys-specific extension */
diff --git a/kernel/resource.c b/kernel/resource.c
index 7640b3a..53b42f0 100644
--- a/kernel/resource.c
+++ b/kernel/resource.c
@@ -38,6 +38,14 @@ struct resource iomem_resource = {
 };
 EXPORT_SYMBOL(iomem_resource);
 
+struct resource iobusn_resource = {
+	.name	= "PCI busn",
+	.start	= 0,
+	.end	= 0xffffff,
+	.flags	= IORESOURCE_BUS,
+};
+EXPORT_SYMBOL(iobusn_resource);
+
 /* constraints to be met while allocating resources */
 struct resource_constraint {
 	resource_size_t min, max, align;
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 03/14] PCI: Add busn_res operation functions
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
  2012-01-31  7:42 ` [PATCH 01/14] Make %pR could handle bus resource with domain Yinghai Lu
  2012-01-31  7:42 ` [PATCH 02/14] PCI: Add iobusn_resource Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 04/14] PCI: Add busn_res tracking in core Yinghai Lu
                   ` (11 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

will use them insert/update busn res in pci_bus

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   36 ++++++++++++++++++++++++++++++++++++
 include/linux/pci.h |    3 +++
 2 files changed, 39 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index a114173..957c2bc 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1622,6 +1622,42 @@ err_out:
 	return NULL;
 }
 
+void pci_bus_insert_busn_res(struct pci_bus *b, int bus, int bus_max)
+{
+	struct resource *res = &b->busn_res;
+	struct resource *parent_res = &iobusn_resource;
+	int ret;
+
+	res->start = (pci_domain_nr(b) << 8) | bus;
+	res->end = (pci_domain_nr(b) << 8) | bus_max;
+	res->flags = IORESOURCE_BUS;
+
+	if (!pci_is_root_bus(b))
+		parent_res = &b->parent->busn_res;
+
+	ret = insert_resource(parent_res, res);
+
+	dev_printk(KERN_DEBUG, &b->dev,
+			"busn_res: %pR %s inserted under %pR\n",
+			res, ret ? "can not be" : "is", parent_res);
+}
+
+void pci_bus_update_busn_res_end(struct pci_bus *b, int bus_max)
+{
+	struct resource *res = &b->busn_res;
+	struct resource old_res = *res;
+
+	res->end &= ~0xff;
+	res->end |= bus_max;
+	dev_printk(KERN_DEBUG, &b->dev, "busn_res: %pR end updated to %pR\n",
+			&old_res, res);
+}
+
+void pci_bus_release_busn_res(struct pci_bus *b)
+{
+	release_resource(&b->busn_res);
+}
+
 struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
 		struct pci_ops *ops, void *sysdata, struct list_head *resources)
 {
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 94ad468..3da935c 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -665,6 +665,9 @@ struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata);
 struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
 				    struct pci_ops *ops, void *sysdata,
 				    struct list_head *resources);
+void pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
+void pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
+void pci_bus_release_busn_res(struct pci_bus *b);
 struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
 					     struct pci_ops *ops, void *sysdata,
 					     struct list_head *resources);
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 04/14] PCI: Add busn_res tracking in core
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (2 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 03/14] PCI: Add busn_res operation functions Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 05/14] PCI, x86: Register busn_res for root buses Yinghai Lu
                   ` (10 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

update pci_scan_root_bus, and pci_scan_bus to insert root bus busn into
iobusn_resource tree.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c  |   30 ++++++++++++++++++++++++++----
 drivers/pci/remove.c |    1 +
 include/linux/pci.h  |    4 ++++
 3 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 957c2bc..79de0dd 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1658,8 +1658,9 @@ void pci_bus_release_busn_res(struct pci_bus *b)
 	release_resource(&b->busn_res);
 }
 
-struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
-		struct pci_ops *ops, void *sysdata, struct list_head *resources)
+struct pci_bus * __devinit pci_scan_root_bus_max(struct device *parent, int bus,
+		int bus_max, struct pci_ops *ops, void *sysdata,
+		struct list_head *resources)
 {
 	struct pci_bus *b;
 
@@ -1667,10 +1668,26 @@ struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
 	if (!b)
 		return NULL;
 
+	pci_bus_insert_busn_res(b, bus, bus_max);
 	b->subordinate = pci_scan_child_bus(b);
 	pci_bus_add_devices(b);
 	return b;
 }
+EXPORT_SYMBOL(pci_scan_root_bus_max);
+
+struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
+		struct pci_ops *ops, void *sysdata,
+		struct list_head *resources)
+{
+	struct pci_bus *b;
+
+	b = pci_scan_root_bus_max(parent, bus, 255, ops, sysdata, resources);
+
+	if (b)
+		pci_bus_update_busn_res_end(b, b->subordinate);
+
+	return b;
+}
 EXPORT_SYMBOL(pci_scan_root_bus);
 
 /* Deprecated; use pci_scan_root_bus() instead */
@@ -1683,9 +1700,11 @@ struct pci_bus * __devinit pci_scan_bus_parented(struct device *parent,
 	pci_add_resource(&resources, &ioport_resource);
 	pci_add_resource(&resources, &iomem_resource);
 	b = pci_create_root_bus(parent, bus, ops, sysdata, &resources);
-	if (b)
+	if (b) {
+		pci_bus_insert_busn_res(b, bus, 255);
 		b->subordinate = pci_scan_child_bus(b);
-	else
+		pci_bus_update_busn_res_end(b, b->subordinate);
+	} else
 		pci_free_resource_list(&resources);
 	return b;
 }
@@ -1701,7 +1720,10 @@ struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops,
 	pci_add_resource(&resources, &iomem_resource);
 	b = pci_create_root_bus(NULL, bus, ops, sysdata, &resources);
 	if (b) {
+		pci_bus_insert_busn_res(b, bus, 255);
 		b->subordinate = pci_scan_child_bus(b);
+		pci_bus_update_busn_res_end(b, b->subordinate);
+
 		pci_bus_add_devices(b);
 	} else {
 		pci_free_resource_list(&resources);
diff --git a/drivers/pci/remove.c b/drivers/pci/remove.c
index bd70f23..8056e6a 100644
--- a/drivers/pci/remove.c
+++ b/drivers/pci/remove.c
@@ -68,6 +68,7 @@ void pci_remove_bus(struct pci_bus *pci_bus)
 
 	down_write(&pci_bus_sem);
 	list_del(&pci_bus->node);
+	pci_bus_release_busn_res(pci_bus);
 	up_write(&pci_bus_sem);
 	if (!pci_bus->is_added)
 		return;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 3da935c..d5b6786 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -668,6 +668,10 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
 void pci_bus_insert_busn_res(struct pci_bus *b, int bus, int busmax);
 void pci_bus_update_busn_res_end(struct pci_bus *b, int busmax);
 void pci_bus_release_busn_res(struct pci_bus *b);
+struct pci_bus * __devinit pci_scan_root_bus_max(struct device *parent, int bus,
+					     int busmax, struct pci_ops *ops,
+					     void *sysdata,
+					     struct list_head *resources);
 struct pci_bus * __devinit pci_scan_root_bus(struct device *parent, int bus,
 					     struct pci_ops *ops, void *sysdata,
 					     struct list_head *resources);
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 05/14] PCI, x86: Register busn_res for root buses
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (3 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 04/14] PCI: Add busn_res tracking in core Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 06/14] PCI, ia64: " Yinghai Lu
                   ` (9 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

update x86_pci_root_bus_resources() to get bus_max for non-acpi case.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 arch/x86/include/asm/topology.h |    3 ++-
 arch/x86/pci/acpi.c             |    8 +++++---
 arch/x86/pci/bus_numa.c         |    8 +++++++-
 arch/x86/pci/common.c           |   11 +++++++----
 4 files changed, 21 insertions(+), 9 deletions(-)

diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index b9676ae..ad4060e 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -172,7 +172,8 @@ static inline void arch_fix_phys_package_id(int num, u32 slot)
 }
 
 struct pci_bus;
-void x86_pci_root_bus_resources(int bus, struct list_head *resources);
+void x86_pci_root_bus_resources(int bus, int *bus_max,
+				struct list_head *resources);
 
 #ifdef CONFIG_SMP
 #define mc_capable()	((boot_cpu_data.x86_max_cores > 1) && \
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index daa4249..b25b5b1 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -348,6 +348,7 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
 	struct acpi_device *device = root->device;
 	int domain = root->segment;
 	int busnum = root->secondary.start;
+	int busmax = root->secondary.end;
 	LIST_HEAD(resources);
 	struct pci_bus *bus;
 	struct pci_sysdata *sd;
@@ -410,12 +411,13 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
 		 * defaults or native bridge info if we're ignoring _CRS.
 		 */
 		if (!pci_use_crs)
-			x86_pci_root_bus_resources(busnum, &resources);
+			x86_pci_root_bus_resources(busnum, &busmax, &resources);
 		bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd,
 					  &resources);
-		if (bus)
+		if (bus) {
+			pci_bus_insert_busn_res(bus, busnum, busmax);
 			bus->subordinate = pci_scan_child_bus(bus);
-		else
+		} else
 			pci_free_resource_list(&resources);
 	}
 
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c
index fd3f655..5213cd8 100644
--- a/arch/x86/pci/bus_numa.c
+++ b/arch/x86/pci/bus_numa.c
@@ -7,7 +7,8 @@
 int pci_root_num;
 struct pci_root_info pci_root_info[PCI_ROOT_NR];
 
-void x86_pci_root_bus_resources(int bus, struct list_head *resources)
+void x86_pci_root_bus_resources(int bus, int *bus_max,
+				struct list_head *resources)
 {
 	int i;
 	int j;
@@ -28,6 +29,7 @@ void x86_pci_root_bus_resources(int bus, struct list_head *resources)
 	       bus);
 
 	info = &pci_root_info[i];
+	*bus_max = info->bus_max;
 	for (j = 0; j < info->res_num; j++) {
 		struct resource *res;
 		struct resource *root;
@@ -51,6 +53,10 @@ default_resources:
 	printk(KERN_DEBUG "PCI: root bus %02x: using default resources\n", bus);
 	pci_add_resource(resources, &ioport_resource);
 	pci_add_resource(resources, &iomem_resource);
+	if (!bus)
+		*bus_max = 0xff;
+	else if (!*bus_max)
+		*bus_max = bus;
 }
 
 void __devinit update_res(struct pci_root_info *info, resource_size_t start,
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 323481e..ce0aefc 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -433,6 +433,7 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
 	LIST_HEAD(resources);
 	struct pci_bus *bus = NULL;
 	struct pci_sysdata *sd;
+	int bus_max;
 
 	while ((bus = pci_find_next_bus(bus)) != NULL) {
 		if (bus->number == busnum) {
@@ -454,8 +455,9 @@ struct pci_bus * __devinit pcibios_scan_root(int busnum)
 	sd->node = get_mp_bus_to_node(busnum);
 
 	printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
-	x86_pci_root_bus_resources(busnum, &resources);
-	bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
+	x86_pci_root_bus_resources(busnum, &bus_max, &resources);
+	bus = pci_scan_root_bus_max(NULL, busnum, bus_max, &pci_root_ops, sd,
+				&resources);
 	if (!bus) {
 		pci_free_resource_list(&resources);
 		kfree(sd);
@@ -643,6 +645,7 @@ struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops,
 	LIST_HEAD(resources);
 	struct pci_bus *bus = NULL;
 	struct pci_sysdata *sd;
+	int bus_max;
 
 	/*
 	 * Allocate per-root-bus (not per bus) arch-specific data.
@@ -655,8 +658,8 @@ struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops,
 		return NULL;
 	}
 	sd->node = node;
-	x86_pci_root_bus_resources(busno, &resources);
-	bus = pci_scan_root_bus(NULL, busno, ops, sd, &resources);
+	x86_pci_root_bus_resources(busno, &bus_max, &resources);
+	bus = pci_scan_root_bus_max(NULL, busno, bus_max, ops, sd, &resources);
 	if (!bus) {
 		pci_free_resource_list(&resources);
 		kfree(sd);
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 06/14] PCI, ia64: Register busn_res for root buses
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (4 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 05/14] PCI, x86: Register busn_res for root buses Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 07/14] PCI, powerpc: " Yinghai Lu
                   ` (8 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu, Fenghua Yu, linux-ia64

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
---
 arch/ia64/pci/pci.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index f82f5d4..936b2f1 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -331,6 +331,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
 	struct acpi_device *device = root->device;
 	int domain = root->segment;
 	int bus = root->secondary.start;
+	int busmax = root->secondary.end;
 	struct pci_controller *controller;
 	unsigned int windows = 0;
 	struct pci_root_info info;
@@ -384,6 +385,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
 		return NULL;
 	}
 
+	pci_bus_insert_busn_res(pbus, busnum, busmax);
 	pbus->subordinate = pci_scan_child_bus(pbus);
 	return pbus;
 
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 07/14] PCI, powerpc: Register busn_res for root buses
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (5 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 06/14] PCI, ia64: " Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 08/14] PCI, parisc: " Yinghai Lu
                   ` (7 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu, Paul Mackerras,
	linuxppc-dev

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
---
 arch/powerpc/kernel/pci-common.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index cce98d7..501f29b 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1732,6 +1732,8 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
 	bus->secondary = hose->first_busno;
 	hose->bus = bus;
 
+	pci_bus_insert_busn_res(bus, hose->first_busno, hose->last_busno);
+
 	/* Get probe mode and perform scan */
 	mode = PCI_PROBE_NORMAL;
 	if (node && ppc_md.pci_probe_mode)
@@ -1742,8 +1744,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
 		of_scan_bus(node, bus);
 	}
 
-	if (mode == PCI_PROBE_NORMAL)
+	if (mode == PCI_PROBE_NORMAL) {
+		pci_bus_update_busn_res_end(bus, 255);
 		hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+		pci_bus_update_busn_res_end(bus, bus->subordinate);
+	}
 
 	/* Platform gets a chance to do some global fixups before
 	 * we proceed to resource allocation
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 08/14] PCI, parisc: Register busn_res for root buses
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (6 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 07/14] PCI, powerpc: " Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 09/14] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
                   ` (6 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu, Kyle McMartin,
	Helge Deller, linux-parisc

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Cc: Helge Deller <deller@gmx.de>
Cc: linux-parisc@vger.kernel.org
---
 drivers/parisc/dino.c    |    2 ++
 drivers/parisc/lba_pci.c |    3 +++
 2 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index 7ff10c1..3f2e203 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -1014,7 +1014,9 @@ static int __init dino_probe(struct parisc_device *dev)
 		return 0;
 	}
 
+	pci_bus_insert_busn_res(bus, dino_current_bus, 255);
 	bus->subordinate = pci_scan_child_bus(bus);
+	pci_bus_update_busn_res_end(bus, bus->subordinate);
 
 	/* This code *depends* on scanning being single threaded
 	 * if it isn't, this global bus number count will fail
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index d5f3d75..b58bf8b 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -1531,6 +1531,9 @@ lba_driver_probe(struct parisc_device *dev)
 		return 0;
 	}
 
+	pci_bus_insert_busn_res(lba_bus, lba_dev->hba.bus_num.start,
+				lba_dev->hba.bus_num.end);
+
 	lba_bus->subordinate = pci_scan_child_bus(lba_bus);
 
 	/* This is in lieu of calling pci_assign_unassigned_resources() */
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 09/14] PCI: Add pci_bus_extend/shrink_top()
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (7 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 08/14] PCI, parisc: " Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 10/14] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
                   ` (5 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

extend or shrink bus and parent buses top (subordinate)

extended range is verified safe range, and stop at recorded parent_res.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   46 ++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 46 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 79de0dd..91fdaec 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -624,6 +624,52 @@ static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
 	}
 }
 
+static void __devinit pci_bus_extend_top(struct pci_bus *parent,
+		 resource_size_t size, struct resource *parent_res)
+{
+	struct resource *res;
+
+	if (!size)
+		return;
+
+	while (parent) {
+		res = &parent->busn_res;
+		if (res == parent_res)
+			break;
+		res->end += size;
+		parent->subordinate += size;
+		pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS,
+					 parent->subordinate);
+		dev_printk(KERN_DEBUG, &parent->dev,
+				"busn_res: extended %02llx to %pR\n",
+				(unsigned long long)size, res);
+		parent = parent->parent;
+	}
+}
+
+static void __devinit pci_bus_shrink_top(struct pci_bus *parent,
+		 resource_size_t size, struct resource *parent_res)
+{
+	struct resource *res;
+
+	if (!size)
+		return;
+
+	while (parent) {
+		res = &parent->busn_res;
+		if (res == parent_res)
+			break;
+		res->end -= size;
+		parent->subordinate -= size;
+		pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS,
+					 parent->subordinate);
+		dev_printk(KERN_DEBUG, &parent->dev,
+				"busn_res: shrunk %02llx to %pR\n",
+				(unsigned long long)size, res);
+		parent = parent->parent;
+	}
+}
+
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 10/14] PCI: Probe safe range that we can use for unassigned bridge.
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (8 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 09/14] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 11/14] PCI: Strict checking of valid range for bridge Yinghai Lu
                   ` (4 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

Try to allocate from parent bus busn_res. if can not find any big enough, will try
to extend parent bus top. even the extending is through allocating, after allocating
will pad the range to parent buses top.

When extending happens, We will record the parent_res, so could use it as stopper
for really extend/shrink top later.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |  114 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 114 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 91fdaec..10aa6d1 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -670,6 +670,120 @@ static void __devinit pci_bus_shrink_top(struct pci_bus *parent,
 	}
 }
 
+static resource_size_t __devinit find_res_top_free_size(struct resource *res)
+{
+	int ret = -ENOMEM;
+	resource_size_t n_size;
+	struct resource tmp_res;
+
+	/*
+	 *   find out number below res->end, that we can use at first
+	 *	res->start can not be used.
+	 */
+	n_size = resource_size(res) - 1;
+	memset(&tmp_res, 0, sizeof(struct resource));
+	while (n_size > 0) {
+		ret = allocate_resource(res, &tmp_res, n_size,
+			res->end - n_size + 1, res->end,
+			1, NULL, NULL);
+		if (ret == 0) {
+			/* release busn_res */
+			release_resource(&tmp_res);
+			break;
+		}
+		n_size--;
+	}
+
+	return n_size;
+}
+
+static int __devinit pci_bridge_probe_busn_res(struct pci_bus *bus,
+			 struct pci_dev *dev, struct resource *busn_res,
+			 resource_size_t needed_size, struct resource **p)
+{
+	int ret = -ENOMEM;
+	resource_size_t n_size;
+	struct pci_bus *parent;
+	struct resource *parent_res;
+	resource_size_t tmp = bus->busn_res.end + 1;
+	int free_sz = -1;
+
+	parent_res = NULL;
+
+again:
+	/*
+	 * find bigest range in bus->busn_res that we can use in the middle
+	 *  and we can not use bus->busn_res.start.
+	 */
+	n_size = resource_size(&bus->busn_res) - 1;
+	memset(busn_res, 0, sizeof(struct resource));
+	dev_printk(KERN_DEBUG, &dev->dev,
+			"find free busn in busn_res: %pR\n", &bus->busn_res);
+	while (n_size >= needed_size) {
+		ret = allocate_resource(&bus->busn_res, busn_res, n_size,
+				bus->busn_res.start + 1, bus->busn_res.end,
+				1, NULL, NULL);
+		if (ret == 0) {
+			/* found one, prepare to return */
+			release_resource(busn_res);
+
+			return ret;
+		}
+		n_size--;
+	}
+
+	/* try extend the top of parent buss */
+	if (free_sz < 0) {
+		free_sz = find_res_top_free_size(&bus->busn_res);
+		dev_printk(KERN_DEBUG, &dev->dev,
+			"found free busn %d in busn_res: %pR top\n",
+				free_sz, &bus->busn_res);
+	}
+	n_size = free_sz;
+
+	/* check if extend could cross domain boundary */
+	if ((bus->busn_res.end & 0xff) == 0xff)
+		goto reduce_needed_size;
+	if ((0x100 - (tmp & 0xff)) < (needed_size - n_size))
+		goto reduce_needed_size;
+
+	/* find exteded range */
+	memset(busn_res, 0, sizeof(struct resource));
+	parent = bus->parent;
+	while (parent) {
+		ret = allocate_resource(&parent->busn_res, busn_res,
+			 needed_size - n_size,
+			 tmp, tmp + needed_size - n_size - 1,
+			 1, NULL, NULL);
+		if (ret == 0)
+			break;
+		parent = parent->parent;
+	}
+
+reduce_needed_size:
+	if (ret != 0) {
+		needed_size--;
+		if (!needed_size)
+			return ret;
+
+		goto again;
+	}
+
+	/* save parent_res, we need it as stopper later */
+	parent_res = busn_res->parent;
+
+	/* prepare busn_res for return */
+	release_resource(busn_res);
+	busn_res->start -= n_size;
+
+	/* extend parent bus top*/
+	pci_bus_extend_top(bus, needed_size - n_size, parent_res);
+
+	*p = parent_res;
+
+	return ret;
+}
+
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 11/14] PCI: Strict checking of valid range for bridge
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (9 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 10/14] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 12/14] PCI: Allocate bus range instead of use max blindly Yinghai Lu
                   ` (3 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

children bridges busn range should be able to be allocated from parent bus range.

to avoid overlapping between sibling bridges on same bus.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   25 +++++++++++++++++++++++++
 1 files changed, 25 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 10aa6d1..b9459c5 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -784,6 +784,31 @@ reduce_needed_size:
 	return ret;
 }
 
+static int __devinit pci_bridge_check_busn_broken(struct pci_bus *bus,
+				struct pci_dev *dev,
+				int secondary, int subordinate)
+{
+	int broken = 0;
+
+	struct resource busn_res;
+	int ret;
+
+	memset(&busn_res, 0, sizeof(struct resource));
+	dev_printk(KERN_DEBUG, &dev->dev,
+		 "check if busn %02x-%02x is in busn_res: %pR\n",
+		 secondary, subordinate, &bus->busn_res);
+	ret = allocate_resource(&bus->busn_res, &busn_res,
+			 (subordinate - secondary + 1),
+			 (pci_domain_nr(bus)<<8) | secondary,
+			 (pci_domain_nr(bus)<<8) | subordinate,
+			 1, NULL, NULL);
+	if (ret)
+		broken = 1;
+	else
+		release_resource(&busn_res);
+
+	return broken;
+}
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 12/14] PCI: Allocate bus range instead of use max blindly
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (10 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 11/14] PCI: Strict checking of valid range for bridge Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 13/14] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
                   ` (2 subsequent siblings)
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

every bus have extra busn_res, and linked them toghter to iobusn_resource.

when need to find usable bus number range, try probe from iobusn_resource tree.

To avoid falling to small hole in the middle, we try from 8 spare bus.
if can not find 8 or more in the middle, will try to append 8 on top later.
then if can not append, will try to find 7 from the middle, then will try to append 7 on top.
then if can not append, will try to find 6 from the middle...

for cardbus will only find 4 spare.

if extend from top, at last will shrink back to really needed range...

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   94 ++++++++++++++++++++++++++++-----------------------
 1 files changed, 52 insertions(+), 42 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index b9459c5..931cd8e 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -823,10 +823,11 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 {
 	struct pci_bus *child;
 	int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
-	u32 buses, i, j = 0;
+	u32 buses;
 	u16 bctl;
 	u8 primary, secondary, subordinate;
 	int broken = 0;
+	struct resource *parent_res = NULL;
 
 	pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
 	primary = buses & 0xFF;
@@ -838,10 +839,16 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 
 	/* Check if setup is sensible at all */
 	if (!pass &&
-	    (primary != bus->number || secondary <= bus->number)) {
-		dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
+	    (primary != bus->number || secondary <= bus->number))
 		broken = 1;
-	}
+
+	/* more strict checking */
+	if (!pass && !broken)
+		broken = pci_bridge_check_busn_broken(bus, dev,
+						   secondary, subordinate);
+
+	if (broken)
+		dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
 
 	/* Disable MasterAbortMode during probing to avoid reporting
 	   of bus errors (in some architectures) */ 
@@ -874,6 +881,8 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 			child->primary = primary;
 			child->subordinate = subordinate;
 			child->bridge_ctl = bctl;
+
+			pci_bus_insert_busn_res(child, secondary, subordinate);
 		}
 
 		cmax = pci_scan_child_bus(child);
@@ -886,6 +895,11 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 		 * We need to assign a number to this bus which we always
 		 * do in the second pass.
 		 */
+		resource_size_t shrink_size;
+		struct resource busn_res;
+		int ret = -ENOMEM;
+		int old_max = max;
+
 		if (!pass) {
 			if (pcibios_assign_all_busses() || broken)
 				/* Temporarily disable forwarding of the
@@ -902,20 +916,35 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 		/* Clear errors */
 		pci_write_config_word(dev, PCI_STATUS, 0xffff);
 
-		/* Prevent assigning a bus number that already exists.
-		 * This can happen when a bridge is hot-plugged, so in
-		 * this case we only re-scan this bus. */
-		child = pci_find_bus(pci_domain_nr(bus), max+1);
-		if (!child) {
-			child = pci_add_new_bus(bus, dev, ++max);
-			if (!child)
-				goto out;
-		}
+		/*
+		 * For CardBus bridges, we leave 4 bus numbers
+		 * as cards with a PCI-to-PCI bridge can be
+		 * inserted later.
+		 * other just allocate 8 bus to avoid we fall into
+		 *  small hole in the middle.
+		 */
+		ret = pci_bridge_probe_busn_res(bus, dev, &busn_res,
+				is_cardbus ? (CARDBUS_RESERVE_BUSNR + 1) : 8,
+				&parent_res);
+
+		if (ret != 0)
+			goto out;
+
+		child = pci_add_new_bus(bus, dev, busn_res.start & 0xff);
+		if (!child)
+			goto out;
+
+		child->subordinate = busn_res.end & 0xff;
+		pci_bus_insert_busn_res(child, busn_res.start & 0xff,
+					busn_res.end & 0xff);
+
 		buses = (buses & 0xff000000)
 		      | ((unsigned int)(child->primary)     <<  0)
 		      | ((unsigned int)(child->secondary)   <<  8)
 		      | ((unsigned int)(child->subordinate) << 16);
 
+		max = child->subordinate;
+
 		/*
 		 * yenta.c forces a secondary latency timer of 176.
 		 * Copy that behaviour here.
@@ -946,43 +975,24 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 			 * the real value of max.
 			 */
 			pci_fixup_parent_subordinate_busnr(child, max);
+
 		} else {
-			/*
-			 * For CardBus bridges, we leave 4 bus numbers
-			 * as cards with a PCI-to-PCI bridge can be
-			 * inserted later.
-			 */
-			for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) {
-				struct pci_bus *parent = bus;
-				if (pci_find_bus(pci_domain_nr(bus),
-							max+i+1))
-					break;
-				while (parent->parent) {
-					if ((!pcibios_assign_all_busses()) &&
-					    (parent->subordinate > max) &&
-					    (parent->subordinate <= max+i)) {
-						j = 1;
-					}
-					parent = parent->parent;
-				}
-				if (j) {
-					/*
-					 * Often, there are two cardbus bridges
-					 * -- try to leave one valid bus number
-					 * for each one.
-					 */
-					i /= 2;
-					break;
-				}
-			}
-			max += i;
 			pci_fixup_parent_subordinate_busnr(child, max);
 		}
 		/*
 		 * Set the subordinate bus number to its real value.
 		 */
+		shrink_size = child->subordinate - max;
 		child->subordinate = max;
 		pci_write_config_byte(dev, PCI_SUBORDINATE_BUS, max);
+		pci_bus_update_busn_res_end(child, max);
+
+		/* shrink some back, if we extend top before */
+		if (!is_cardbus && (shrink_size > 0) && parent_res)
+			pci_bus_shrink_top(bus, shrink_size, parent_res);
+
+		if (old_max > max)
+			max = old_max;
 	}
 
 	sprintf(child->name,
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 13/14] PCI: kill pci_fixup_parent_subordinate_busnr()
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (11 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 12/14] PCI: Allocate bus range instead of use max blindly Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31  7:42 ` [PATCH 14/14] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
  2012-01-31 17:49 ` [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Bjorn Helgaas
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

Now we can safely extend parent top and shrink them according iobusn_resource tree.

Don't need that any more.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   33 ++-------------------------------
 1 files changed, 2 insertions(+), 31 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 931cd8e..86a4402 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -608,22 +608,6 @@ struct pci_bus *__ref pci_add_new_bus(struct pci_bus *parent, struct pci_dev *de
 	return child;
 }
 
-static void pci_fixup_parent_subordinate_busnr(struct pci_bus *child, int max)
-{
-	struct pci_bus *parent = child->parent;
-
-	/* Attempts to fix that up are really dangerous unless
-	   we're going to re-assign all bus numbers. */
-	if (!pcibios_assign_all_busses())
-		return;
-
-	while (parent->parent && parent->subordinate < max) {
-		parent->subordinate = max;
-		pci_write_config_byte(parent->self, PCI_SUBORDINATE_BUS, max);
-		parent = parent->parent;
-	}
-}
-
 static void __devinit pci_bus_extend_top(struct pci_bus *parent,
 		 resource_size_t size, struct resource *parent_res)
 {
@@ -961,24 +945,11 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 
 		if (!is_cardbus) {
 			child->bridge_ctl = bctl;
-			/*
-			 * Adjust subordinate busnr in parent buses.
-			 * We do this before scanning for children because
-			 * some devices may not be detected if the bios
-			 * was lazy.
-			 */
-			pci_fixup_parent_subordinate_busnr(child, max);
+
 			/* Now we can scan all subordinate buses... */
 			max = pci_scan_child_bus(child);
-			/*
-			 * now fix it up again since we have found
-			 * the real value of max.
-			 */
-			pci_fixup_parent_subordinate_busnr(child, max);
-
-		} else {
-			pci_fixup_parent_subordinate_busnr(child, max);
 		}
+
 		/*
 		 * Set the subordinate bus number to its real value.
 		 */
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* [PATCH 14/14] PCI: Seperate child bus scanning to two passes overall
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (12 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 13/14] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
@ 2012-01-31  7:42 ` Yinghai Lu
  2012-01-31 17:49 ` [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Bjorn Helgaas
  14 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31  7:42 UTC (permalink / raw)
  To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
  Cc: Bjorn Helgaas, Andrew Morton, Linus Torvalds, linux-pci,
	linux-kernel, linux-arch, Yinghai Lu

In extreme case: Two bridges are properly setup.
       bridge A
               bridge AA
               bridge AB
       bridge B
	       bridge BA
	       bridge BB
   but AA, AB are not setup properly.
   bridge A has small range, and bridge AB could need more, when do the
       first pass0 for bridge A, it will do pass0 and pass1 for AA and AB,
	during that process, it will extend range of A for AB blindly.
	because bridge B is not registered yet.
       that could overlap range that is used by bridge B.

Right way should be:
       do pass0 for all good bridges at first.
So we could do pass0 for bridge B before pass1 for bridge AB.

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
---
 drivers/pci/probe.c |   50 ++++++++++++++++++++++++++++++++++----------------
 1 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 86a4402..2907b74 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -793,6 +793,9 @@ static int __devinit pci_bridge_check_busn_broken(struct pci_bus *bus,
 
 	return broken;
 }
+
+static unsigned int __devinit __pci_scan_child_bus(struct pci_bus *bus,
+						 int pass);
 /*
  * If it's a bridge, configure it and scan the bus behind it.
  * For CardBus bridges, we don't scan behind as the devices will
@@ -844,11 +847,10 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 	    !is_cardbus && !broken) {
 		unsigned int cmax;
 		/*
-		 * Bus already configured by firmware, process it in the first
-		 * pass and just note the configuration.
+		 * Bus already configured by firmware, still process it in two
+		 * passes in extreme case like two adjaced bridges have children
+		 * bridges that are not setup properly.
 		 */
-		if (pass)
-			goto out;
 
 		/*
 		 * If we already got to this bus through a different bridge,
@@ -869,7 +871,7 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
 			pci_bus_insert_busn_res(child, secondary, subordinate);
 		}
 
-		cmax = pci_scan_child_bus(child);
+		cmax = __pci_scan_child_bus(child, pass);
 		if (cmax > max)
 			max = cmax;
 		if (child->subordinate > max)
@@ -1659,12 +1661,13 @@ void pcie_bus_configure_settings(struct pci_bus *bus, u8 mpss)
 }
 EXPORT_SYMBOL_GPL(pcie_bus_configure_settings);
 
-unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
+static unsigned int __devinit __pci_scan_child_bus(struct pci_bus *bus,
+						 int pass)
 {
-	unsigned int devfn, pass, max = bus->secondary;
+	unsigned int devfn, max = bus->secondary;
 	struct pci_dev *dev;
 
-	dev_dbg(&bus->dev, "scanning bus\n");
+	dev_dbg(&bus->dev, "scanning bus pass %d\n", pass);
 
 	/* Go find them, Rover! */
 	for (devfn = 0; devfn < 0x100; devfn += 8)
@@ -1678,18 +1681,16 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
 	 * all PCI-to-PCI bridges on this bus.
 	 */
 	if (!bus->is_added) {
-		dev_dbg(&bus->dev, "fixups for bus\n");
+		dev_dbg(&bus->dev, "fixups for bus pass %d\n", pass);
 		pcibios_fixup_bus(bus);
 		if (pci_is_root_bus(bus))
 			bus->is_added = 1;
 	}
 
-	for (pass=0; pass < 2; pass++)
-		list_for_each_entry(dev, &bus->devices, bus_list) {
-			if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
-			    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
-				max = pci_scan_bridge(bus, dev, max, pass);
-		}
+	list_for_each_entry(dev, &bus->devices, bus_list)
+		if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+		    dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
+			max = pci_scan_bridge(bus, dev, max, pass);
 
 	/*
 	 * We've scanned the bus and so we know all about what's on
@@ -1698,7 +1699,24 @@ unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
 	 *
 	 * Return how far we've got finding sub-buses.
 	 */
-	dev_dbg(&bus->dev, "bus scan returning with max=%02x\n", max);
+	dev_dbg(&bus->dev, "bus scan returning with max=%02x pass %d\n",
+			max, pass);
+
+	return max;
+}
+
+unsigned int __devinit pci_scan_child_bus(struct pci_bus *bus)
+{
+	int pass;
+	unsigned int max = 0, tmp;
+
+	for (pass = 0; pass < 2;  pass++) {
+		tmp = __pci_scan_child_bus(bus, pass);
+
+		if (tmp > max)
+			max = tmp;
+	}
+
 	return max;
 }
 
-- 
1.7.7


^ permalink raw reply related	[flat|nested] 19+ messages in thread

* Re: [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn
  2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
                   ` (13 preceding siblings ...)
  2012-01-31  7:42 ` [PATCH 14/14] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
@ 2012-01-31 17:49 ` Bjorn Helgaas
  2012-01-31 18:56   ` Yinghai Lu
  14 siblings, 1 reply; 19+ messages in thread
From: Bjorn Helgaas @ 2012-01-31 17:49 UTC (permalink / raw)
  To: Yinghai Lu
  Cc: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck, Andrew Morton,
	Linus Torvalds, linux-pci, linux-kernel, linux-arch

On Mon, Jan 30, 2012 at 11:42 PM, Yinghai Lu <yinghai@kernel.org> wrote:
> could be found at:
>        git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci-busn-alloc
>
> -v2: according to Jesse, split to more small patches.
> -v3: address some request from Bjorn. like make use %pR for busn_res debug print
>        out, and move the comment change with code change.

I don't see v3 in that git tree; maybe it needs to be pushed?

^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn
  2012-01-31 17:49 ` [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Bjorn Helgaas
@ 2012-01-31 18:56   ` Yinghai Lu
  2012-01-31 23:30     ` Bjorn Helgaas
  0 siblings, 1 reply; 19+ messages in thread
From: Yinghai Lu @ 2012-01-31 18:56 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck, Andrew Morton,
	Linus Torvalds, linux-pci, linux-kernel, linux-arch

On Tue, Jan 31, 2012 at 9:49 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> On Mon, Jan 30, 2012 at 11:42 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>> could be found at:
>>        git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci-busn-alloc
>>
>> -v2: according to Jesse, split to more small patches.
>> -v3: address some request from Bjorn. like make use %pR for busn_res debug print
>>        out, and move the comment change with code change.
>
> I don't see v3 in that git tree; maybe it needs to be pushed?

yeah. forgot to push.

should be there now.

Yinghai

^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn
  2012-01-31 18:56   ` Yinghai Lu
@ 2012-01-31 23:30     ` Bjorn Helgaas
  2012-02-01  0:27       ` Yinghai Lu
  0 siblings, 1 reply; 19+ messages in thread
From: Bjorn Helgaas @ 2012-01-31 23:30 UTC (permalink / raw)
  To: Yinghai Lu
  Cc: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck, Andrew Morton,
	Linus Torvalds, linux-pci, linux-kernel, linux-arch

[-- Attachment #1: Type: text/plain, Size: 3524 bytes --]

On Tue, Jan 31, 2012 at 10:56 AM, Yinghai Lu <yinghai@kernel.org> wrote:
> On Tue, Jan 31, 2012 at 9:49 AM, Bjorn Helgaas <bhelgaas@google.com> wrote:
>> On Mon, Jan 30, 2012 at 11:42 PM, Yinghai Lu <yinghai@kernel.org> wrote:
>>> could be found at:
>>>        git://git.kernel.org/pub/scm/linux/kernel/git/yinghai/linux-yinghai.git for-pci-busn-alloc
>>>
>>> -v2: according to Jesse, split to more small patches.
>>> -v3: address some request from Bjorn. like make use %pR for busn_res debug print
>>>        out, and move the comment change with code change.
>>
>> I don't see v3 in that git tree; maybe it needs to be pushed?
>
> yeah. forgot to push.
>
> should be there now.

Thanks.  I tried this, and it blew up as soon as I did a rescan.  More
complete console log attached.

# echo 1 > /sys/bus/pci/rescan
[  140.237870] pci_bus 0000:00: scanning bus pass 0
[  140.242551] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 0
[  140.249249] pci 0000:00:01.0: check if busn 01-01 is in busn_res: [bus 00-7e]
[  140.256377] pci 0000:00:01.0: bus configuration invalid, reconfiguring
[  140.262912] pci 0000:00:01.1: scanning [bus 02-02] behind bridge, pass 0
[  140.269593] pci 0000:00:01.1: check if busn 02-02 is in busn_res: [bus 00-7e]
[  140.276721] pci 0000:00:01.1: bus configuration invalid, reconfiguring
...
[  149.111070] ------------[ cut here ]------------
[  149.115721] WARNING: at net/sched/sch_generic.c:256
dev_watchdog+0x259/0x270()
[  149.126339] NETDEV WATCHDOG: eth0 (bnx2x): transmit queue 2 timed out
[  149.132784] Modules linked in: w1_therm ds2482 wire msr cpuid bnx2x
crc32c libcrc32c mdio ipv6 genrtc
[  149.142259] Pid: 0, comm: swapper/11 Not tainted 3.3.0-smp-DEV #4
[  149.148349] Call Trace:
[  149.150816]  <IRQ>  [<ffffffff8108de33>] warn_slowpath_common+0x83/0x120
[  149.157545]  [<ffffffff8108df86>] warn_slowpath_fmt+0x46/0x60
[  149.163282]  [<ffffffff810af15a>] ? __queue_work+0x15a/0x4b0
[  149.168928]  [<ffffffff81558259>] dev_watchdog+0x259/0x270
[  149.174412]  [<ffffffff8109fe2e>] run_timer_softirq+0x13e/0x8b0
[  149.180344]  [<ffffffff810c8ace>] ? scheduler_tick+0x1fe/0x2f0
[  149.186174]  [<ffffffff81558000>] ? __netdev_watchdog_up+0x80/0x80
[  149.192359]  [<ffffffff810764bd>] ? lapic_next_event+0x1d/0x30
[  149.198180]  [<ffffffff81095981>] __do_softirq+0xb1/0x1e0
[  149.203594]  [<ffffffff810e1114>] ? tick_program_event+0x24/0x30
[  149.209604]  [<ffffffff815e9d8c>] call_softirq+0x1c/0x30
[  149.214932]  [<ffffffff810580b5>] do_softirq+0x55/0x90
[  149.220068]  [<ffffffff8109578d>] irq_exit+0xbd/0xe0
[  149.225040]  [<ffffffff815ea50e>] smp_apic_timer_interrupt+0x6e/0x99
[  149.231405]  [<ffffffff815e944b>] apic_timer_interrupt+0x6b/0x70
[  149.237408]  <EOI>  [<ffffffff814f0aa5>] ? poll_idle+0x45/0x90
[  149.243289]  [<ffffffff814f0a7c>] ? poll_idle+0x1c/0x90
[  149.248505]  [<ffffffff810bd578>] ? hrtimer_start+0x18/0x20
[  149.254079]  [<ffffffff814f05a0>] cpuidle_idle_call+0xe0/0x200
[  149.259917]  [<ffffffff81055fd6>] cpu_idle+0x96/0xf0
[  149.264903]  [<ffffffff818f4f8c>] start_secondary+0x1d1/0x1d5
[  149.270640] ---[ end trace 628fdd480099dccf ]---
[  149.285310] bnx2x: [bnx2x_stats_comp:143(eth0)]timeout waiting for
stats finished
[  149.302817] bnx2x: [bnx2x_stats_comp:143(eth0)]timeout waiting for
stats finished
[  150.310050] bnx2x: [bnx2x_clean_tx_queue:1375(eth0)]timeout waiting
for queue[0]: txdata->tx_pkt_prod(232) != txdata->tx_pkt_cons(229)
...

[-- Attachment #2: boot --]
[-- Type: application/octet-stream, Size: 61998 bytes --]

[    2.000381] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
[    2.009730] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-7e])
[    2.016175] pci_root PNP0A08:00: host bridge window [io  0x0000-0x03af]
[    2.022777] pci_root PNP0A08:00: host bridge window [io  0x03e0-0x0cf7]
[    2.029376] pci_root PNP0A08:00: host bridge window [io  0x0d00-0x9fff]
[    2.035976] pci_root PNP0A08:00: host bridge window [mem 0x000c0000-0x000dffff]
[    2.043267] pci_root PNP0A08:00: host bridge window [mem 0x80000000-0xdfffffff]
[    2.050551] pci_root PNP0A08:00: host bridge window [mem 0x1080000000-0x3c0fffffffff]
[    2.058419] PCI host bridge to bus 0000:00
[    2.062505] pci_bus 0000:00: root bus resource [io  0x0000-0x03af]
[    2.068671] pci_bus 0000:00: root bus resource [io  0x03e0-0x0cf7]
[    2.074831] pci_bus 0000:00: root bus resource [io  0x0d00-0x9fff]
[    2.080991] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff]
[    2.087850] pci_bus 0000:00: root bus resource [mem 0x80000000-0xdfffffff]
[    2.094708] pci_bus 0000:00: root bus resource [mem 0x1080000000-0x3c0fffffffff]
[    2.102088] pci_bus 0000:00: busn_res: [bus 00-7e] is inserted under [bus 0000:00-ffff:ff]
[    2.110330] pci_bus 0000:00: scanning bus pass 0
[    2.114965] pci 0000:00:00.0: [8086:3c00] type 0 class 0x000600
[    2.151063] pci 0000:00:01.0: [8086:3c02] type 1 class 0x000604
[    2.187181] pci 0000:00:01.1: [8086:3c03] type 1 class 0x000604
[    2.223286] pci 0000:00:02.0: [8086:3c04] type 1 class 0x000604
[    2.259408] pci 0000:00:02.2: [8086:3c06] type 1 class 0x000604
[    2.295516] pci 0000:00:03.0: [8086:3c08] type 1 class 0x000604
[    2.331632] pci 0000:00:03.1: [8086:3c09] type 1 class 0x000604
[    2.367740] pci 0000:00:03.2: [8086:3c0a] type 1 class 0x000604
[    2.403861] pci 0000:00:03.3: [8086:3c0b] type 1 class 0x000604
[    2.439964] pci 0000:00:05.0: [8086:3c28] type 0 class 0x000880
[    2.472087] pci 0000:00:05.2: [8086:3c2a] type 0 class 0x000880
[    2.497921] pci 0000:00:05.4: [8086:3c2c] type 0 class 0x000800
[    2.510085] pci 0000:00:05.4: reg 10: [mem 0xdff03000-0xdff03fff]
[    2.529853] pci 0000:00:11.0: [8086:1d3e] type 1 class 0x000604
[    2.566023] pci 0000:00:1a.0: [8086:1d2d] type 0 class 0x000c03
[    2.578201] pci 0000:00:1a.0: reg 10: [mem 0xdff02000-0xdff023ff]
[    2.608287] pci 0000:00:1d.0: [8086:1d26] type 0 class 0x000c03
[    2.620455] pci 0000:00:1d.0: reg 10: [mem 0xdff01000-0xdff013ff]
[    2.650534] pci 0000:00:1e.0: [8086:244e] type 1 class 0x000604
[    2.676388] pci 0000:00:1f.0: [8086:1d41] type 0 class 0x000601
[    2.702298] pci 0000:00:1f.2: [8086:1d02] type 0 class 0x000106
[    2.714466] pci 0000:00:1f.2: reg 10: [io  0x9070-0x9077]
[    2.719853] pci 0000:00:1f.2: reg 14: [io  0x9060-0x9063]
[    2.725244] pci 0000:00:1f.2: reg 18: [io  0x9050-0x9057]
[    2.730632] pci 0000:00:1f.2: reg 1c: [io  0x9040-0x9043]
[    2.736019] pci 0000:00:1f.2: reg 20: [io  0x9020-0x903f]
[    2.741409] pci 0000:00:1f.2: reg 24: [mem 0xdff00000-0xdff007ff]
[    2.770563] pci 0000:00:1f.3: [8086:1d22] type 0 class 0x000c05
[    2.782731] pci 0000:00:1f.3: reg 10: [mem 0x3c0ffff20000-0x3c0ffff200ff 64bit]
[    2.790036] pci 0000:00:1f.3: reg 20: [io  0x9000-0x901f]
[    2.809064] pci_bus 0000:00: fixups for bus pass 0
[    2.813841] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 0
[    2.820529] pci 0000:00:01.0: check if busn 01-01 is in busn_res: [bus 00-7e]
[    2.827680] pci_bus 0000:01: busn_res: [bus 01] is inserted under [bus 00-7e]
[    2.834792] pci_bus 0000:01: scanning bus pass 0
[    2.839395] pci_bus 0000:01: fixups for bus pass 0
[    2.844178] pci 0000:00:01.0: PCI bridge to [bus 01-01]
[    2.849393] pci_bus 0000:01: bus scan returning with max=01 pass 0
[    2.855555] pci 0000:00:01.1: scanning [bus 02-02] behind bridge, pass 0
[    2.862239] pci 0000:00:01.1: check if busn 02-02 is in busn_res: [bus 00-7e]
[    2.869380] pci_bus 0000:02: busn_res: [bus 02] is inserted under [bus 00-7e]
[    2.876495] pci_bus 0000:02: scanning bus pass 0
[    2.881105] pci_bus 0000:02: fixups for bus pass 0
[    2.885887] pci 0000:00:01.1: PCI bridge to [bus 02-02]
[    2.891110] pci_bus 0000:02: bus scan returning with max=02 pass 0
[    2.897271] pci 0000:00:02.0: scanning [bus 03-03] behind bridge, pass 0
[    2.903957] pci 0000:00:02.0: check if busn 03-03 is in busn_res: [bus 00-7e]
[    2.911105] pci_bus 0000:03: busn_res: [bus 03] is inserted under [bus 00-7e]
[    2.918218] pci_bus 0000:03: scanning bus pass 0
[    2.922922] pci 0000:03:00.0: [14e4:1662] type 0 class 0x000200
[    2.935144] pci 0000:03:00.0: reg 10: [mem 0x3c0ffe800000-0x3c0ffeffffff 64bit pref]
[    2.942901] pci 0000:03:00.0: reg 18: [mem 0x3c0ffe000000-0x3c0ffe7fffff 64bit pref]
[    2.950657] pci 0000:03:00.0: reg 20: [mem 0x3c0fff010000-0x3c0fff01ffff 64bit pref]
[    2.958411] pci 0000:03:00.0: reg 30: [mem 0xdfe20000-0xdfe3ffff pref]
[    2.982088] pci 0000:03:00.1: [14e4:1662] type 0 class 0x000200
[    2.994319] pci 0000:03:00.1: reg 10: [mem 0x3c0ffd800000-0x3c0ffdffffff 64bit pref]
[    3.002082] pci 0000:03:00.1: reg 18: [mem 0x3c0ffd000000-0x3c0ffd7fffff 64bit pref]
[    3.009840] pci 0000:03:00.1: reg 20: [mem 0x3c0fff000000-0x3c0fff00ffff 64bit pref]
[    3.017597] pci 0000:03:00.1: reg 30: [mem 0xdfe00000-0xdfe1ffff pref]
[    3.041210] pci_bus 0000:03: fixups for bus pass 0
[    3.045991] pci 0000:00:02.0: PCI bridge to [bus 03-03]
[    3.051208] pci 0000:00:02.0:   bridge window [mem 0xdfe00000-0xdfefffff]
[    3.057980] pci 0000:00:02.0:   bridge window [mem 0x3c0ffd000000-0x3c0fff1fffff 64bit pref]
[    3.066392] pci_bus 0000:03: bus scan returning with max=03 pass 0
[    3.072554] pci 0000:00:02.2: scanning [bus 04-04] behind bridge, pass 0
[    3.079237] pci 0000:00:02.2: check if busn 04-04 is in busn_res: [bus 00-7e]
[    3.086385] pci_bus 0000:04: busn_res: [bus 04] is inserted under [bus 00-7e]
[    3.093503] pci_bus 0000:04: scanning bus pass 0
[    3.098111] pci_bus 0000:04: fixups for bus pass 0
[    3.102893] pci 0000:00:02.2: PCI bridge to [bus 04-04]
[    3.108106] pci_bus 0000:04: bus scan returning with max=04 pass 0
[    3.114270] pci 0000:00:03.0: scanning [bus 05-19] behind bridge, pass 0
[    3.120956] pci 0000:00:03.0: check if busn 05-19 is in busn_res: [bus 00-7e]
[    3.128103] pci_bus 0000:05: busn_res: [bus 05-19] is inserted under [bus 00-7e]
[    3.135475] pci_bus 0000:05: scanning bus pass 0
[    3.140102] pci 0000:05:00.0: [10b5:8624] type 0 class 0x000680
[    3.152260] pci 0000:05:00.0: reg 10: [mem 0x00000000-0x0001ffff]
[    3.158360] pci 0000:05:00.0: reg 30: [mem 0x00000000-0x00003fff pref]
[    3.171594] pci_bus 0000:05: fixups for bus pass 0
[    3.176377] pci 0000:00:03.0: PCI bridge to [bus 05-19]
[    3.181594] pci 0000:00:03.0:   bridge window [mem 0xdfd00000-0xdfdfffff]
[    3.188366] pci_bus 0000:05: bus scan returning with max=05 pass 0
[    3.194533] pci 0000:00:03.1: scanning [bus 1a-1a] behind bridge, pass 0
[    3.201216] pci 0000:00:03.1: check if busn 1a-1a is in busn_res: [bus 00-7e]
[    3.208364] pci_bus 0000:1a: busn_res: [bus 1a] is inserted under [bus 00-7e]
[    3.215478] pci_bus 0000:1a: scanning bus pass 0
[    3.220091] pci_bus 0000:1a: fixups for bus pass 0
[    3.224873] pci 0000:00:03.1: PCI bridge to [bus 1a-1a]
[    3.230093] pci_bus 0000:1a: bus scan returning with max=1a pass 0
[    3.236255] pci 0000:00:03.2: scanning [bus 1b-1b] behind bridge, pass 0
[    3.242941] pci 0000:00:03.2: check if busn 1b-1b is in busn_res: [bus 00-7e]
[    3.250086] pci_bus 0000:1b: busn_res: [bus 1b] is inserted under [bus 00-7e]
[    3.257201] pci_bus 0000:1b: scanning bus pass 0
[    3.261802] pci_bus 0000:1b: fixups for bus pass 0
[    3.266577] pci 0000:00:03.2: PCI bridge to [bus 1b-1b]
[    3.271787] pci_bus 0000:1b: bus scan returning with max=1b pass 0
[    3.277954] pci 0000:00:03.3: scanning [bus 1c-1c] behind bridge, pass 0
[    3.284640] pci 0000:00:03.3: check if busn 1c-1c is in busn_res: [bus 00-7e]
[    3.291789] pci_bus 0000:1c: busn_res: [bus 1c] is inserted under [bus 00-7e]
[    3.298901] pci_bus 0000:1c: scanning bus pass 0
[    3.303504] pci_bus 0000:1c: fixups for bus pass 0
[    3.308288] pci 0000:00:03.3: PCI bridge to [bus 1c-1c]
[    3.313509] pci_bus 0000:1c: bus scan returning with max=1c pass 0
[    3.319673] pci 0000:00:11.0: scanning [bus 1d-1d] behind bridge, pass 0
[    3.326356] pci 0000:00:11.0: check if busn 1d-1d is in busn_res: [bus 00-7e]
[    3.333512] pci_bus 0000:1d: busn_res: [bus 1d] is inserted under [bus 00-7e]
[    3.340629] pci_bus 0000:1d: scanning bus pass 0
[    3.345244] pci 0000:1d:00.0: [8086:1d69] type 0 class 0x000107
[    3.357417] pci 0000:1d:00.0: reg 10: [mem 0x3c0fff87c000-0x3c0fff87ffff 64bit pref]
[    3.365147] pci 0000:1d:00.0: reg 18: [mem 0x3c0fff400000-0x3c0fff7fffff 64bit pref]
[    3.372878] pci 0000:1d:00.0: reg 20: [io  0x8000-0x80ff]
[    3.391957] pci_bus 0000:1d: fixups for bus pass 0
[    3.396734] pci 0000:00:11.0: PCI bridge to [bus 1d-1d]
[    3.401952] pci 0000:00:11.0:   bridge window [io  0x8000-0x8fff]
[    3.408030] pci 0000:00:11.0:   bridge window [mem 0xdfc00000-0xdfcfffff]
[    3.414805] pci 0000:00:11.0:   bridge window [mem 0x3c0fff400000-0x3c0fff8fffff 64bit pref]
[    3.423215] pci_bus 0000:1d: bus scan returning with max=1d pass 0
[    3.429383] pci 0000:00:1e.0: scanning [bus 1e-1e] behind bridge, pass 0
[    3.436066] pci 0000:00:1e.0: check if busn 1e-1e is in busn_res: [bus 00-7e]
[    3.443192] pci_bus 0000:1e: busn_res: [bus 1e] is inserted under [bus 00-7e]
[    3.450305] pci_bus 0000:1e: scanning bus pass 0
[    3.454949] pci_bus 0000:1e: fixups for bus pass 0
[    3.459724] pci 0000:00:1e.0: PCI bridge to [bus 1e-1e] (subtractive decode)
[    3.466760] pci 0000:00:1e.0:   bridge window [io  0x0000-0x03af] (subtractive decode)
[    3.474651] pci 0000:00:1e.0:   bridge window [io  0x03e0-0x0cf7] (subtractive decode)
[    3.482539] pci 0000:00:1e.0:   bridge window [io  0x0d00-0x9fff] (subtractive decode)
[    3.490430] pci 0000:00:1e.0:   bridge window [mem 0x000c0000-0x000dffff] (subtractive decode)
[    3.499020] pci 0000:00:1e.0:   bridge window [mem 0x80000000-0xdfffffff] (subtractive decode)
[    3.507601] pci 0000:00:1e.0:   bridge window [mem 0x1080000000-0x3c0fffffffff] (subtractive decode)
[    3.516710] pci_bus 0000:1e: bus scan returning with max=1e pass 0
[    3.522878] pci_bus 0000:00: bus scan returning with max=1e pass 0
[    3.529043] pci_bus 0000:00: scanning bus pass 1
[    3.533690] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 1
[    3.540374] pci_bus 0000:01: scanning bus pass 1
[    3.544981] pci_bus 0000:01: fixups for bus pass 1
[    3.549757] pci 0000:00:01.0: PCI bridge to [bus 01-01]
[    3.554970] pci_bus 0000:01: bus scan returning with max=01 pass 1
[    3.561132] pci 0000:00:01.1: scanning [bus 02-02] behind bridge, pass 1
[    3.567818] pci_bus 0000:02: scanning bus pass 1
[    3.572429] pci_bus 0000:02: fixups for bus pass 1
[    3.577212] pci 0000:00:01.1: PCI bridge to [bus 02-02]
[    3.582432] pci_bus 0000:02: bus scan returning with max=02 pass 1
[    3.588596] pci 0000:00:02.0: scanning [bus 03-03] behind bridge, pass 1
[    3.595281] pci_bus 0000:03: scanning bus pass 1
[    3.599928] pci_bus 0000:03: fixups for bus pass 1
[    3.604706] pci 0000:00:02.0: PCI bridge to [bus 03-03]
[    3.609916] pci 0000:00:02.0:   bridge window [mem 0xdfe00000-0xdfefffff]
[    3.616690] pci 0000:00:02.0:   bridge window [mem 0x3c0ffd000000-0x3c0fff1fffff 64bit pref]
[    3.625101] pci_bus 0000:03: bus scan returning with max=03 pass 1
[    3.631268] pci 0000:00:02.2: scanning [bus 04-04] behind bridge, pass 1
[    3.637954] pci_bus 0000:04: scanning bus pass 1
[    3.642561] pci_bus 0000:04: fixups for bus pass 1
[    3.647346] pci 0000:00:02.2: PCI bridge to [bus 04-04]
[    3.652569] pci_bus 0000:04: bus scan returning with max=04 pass 1
[    3.658733] pci 0000:00:03.0: scanning [bus 05-19] behind bridge, pass 1
[    3.665418] pci_bus 0000:05: scanning bus pass 1
[    3.670025] pci_bus 0000:05: fixups for bus pass 1
[    3.674800] pci 0000:00:03.0: PCI bridge to [bus 05-19]
[    3.680016] pci 0000:00:03.0:   bridge window [mem 0xdfd00000-0xdfdfffff]
[    3.686786] pci_bus 0000:05: bus scan returning with max=05 pass 1
[    3.692953] pci 0000:00:03.1: scanning [bus 1a-1a] behind bridge, pass 1
[    3.699638] pci_bus 0000:1a: scanning bus pass 1
[    3.704246] pci_bus 0000:1a: fixups for bus pass 1
[    3.709019] pci 0000:00:03.1: PCI bridge to [bus 1a-1a]
[    3.714234] pci_bus 0000:1a: bus scan returning with max=1a pass 1
[    3.720396] pci 0000:00:03.2: scanning [bus 1b-1b] behind bridge, pass 1
[    3.727084] pci_bus 0000:1b: scanning bus pass 1
[    3.731692] pci_bus 0000:1b: fixups for bus pass 1
[    3.736473] pci 0000:00:03.2: PCI bridge to [bus 1b-1b]
[    3.741687] pci_bus 0000:1b: bus scan returning with max=1b pass 1
[    3.747851] pci 0000:00:03.3: scanning [bus 1c-1c] behind bridge, pass 1
[    3.754536] pci_bus 0000:1c: scanning bus pass 1
[    3.759146] pci_bus 0000:1c: fixups for bus pass 1
[    3.763921] pci 0000:00:03.3: PCI bridge to [bus 1c-1c]
[    3.769141] pci_bus 0000:1c: bus scan returning with max=1c pass 1
[    3.775304] pci 0000:00:11.0: scanning [bus 1d-1d] behind bridge, pass 1
[    3.781992] pci_bus 0000:1d: scanning bus pass 1
[    3.786603] pci_bus 0000:1d: fixups for bus pass 1
[    3.791381] pci 0000:00:11.0: PCI bridge to [bus 1d-1d]
[    3.796597] pci 0000:00:11.0:   bridge window [io  0x8000-0x8fff]
[    3.802678] pci 0000:00:11.0:   bridge window [mem 0xdfc00000-0xdfcfffff]
[    3.809455] pci 0000:00:11.0:   bridge window [mem 0x3c0fff400000-0x3c0fff8fffff 64bit pref]
[    3.817868] pci_bus 0000:1d: bus scan returning with max=1d pass 1
[    3.824038] pci 0000:00:1e.0: scanning [bus 1e-1e] behind bridge, pass 1
[    3.830723] pci_bus 0000:1e: scanning bus pass 1
[    3.835367] pci_bus 0000:1e: fixups for bus pass 1
[    3.840142] pci 0000:00:1e.0: PCI bridge to [bus 1e-1e] (subtractive decode)
[    3.847180] pci 0000:00:1e.0:   bridge window [io  0x0000-0x03af] (subtractive decode)
[    3.855071] pci 0000:00:1e.0:   bridge window [io  0x03e0-0x0cf7] (subtractive decode)
[    3.862967] pci 0000:00:1e.0:   bridge window [io  0x0d00-0x9fff] (subtractive decode)
[    3.870856] pci 0000:00:1e.0:   bridge window [mem 0x000c0000-0x000dffff] (subtractive decode)
[    3.879435] pci 0000:00:1e.0:   bridge window [mem 0x80000000-0xdfffffff] (subtractive decode)
[    3.888016] pci 0000:00:1e.0:   bridge window [mem 0x1080000000-0x3c0fffffffff] (subtractive decode)
[    3.897116] pci_bus 0000:1e: bus scan returning with max=1e pass 1
[    3.903285] pci_bus 0000:00: bus scan returning with max=1e pass 1
[    7.280825] pci 0000:00:05.4: BAR 0: reserving [mem 0xdff03000-0xdff03fff flags 0x40200] (d=0, p=0)
[    7.289843] pci 0000:00:1a.0: BAR 0: reserving [mem 0xdff02000-0xdff023ff flags 0x40200] (d=0, p=0)
[    7.298863] pci 0000:00:1d.0: BAR 0: reserving [mem 0xdff01000-0xdff013ff flags 0x40200] (d=0, p=0)
[    7.307886] pci 0000:00:1f.2: BAR 0: reserving [io  0x9070-0x9077 flags 0x40101] (d=0, p=0)
[    7.316211] pci 0000:00:1f.2: BAR 1: reserving [io  0x9060-0x9063 flags 0x40101] (d=0, p=0)
[    7.324539] pci 0000:00:1f.2: BAR 2: reserving [io  0x9050-0x9057 flags 0x40101] (d=0, p=0)
[    7.332861] pci 0000:00:1f.2: BAR 3: reserving [io  0x9040-0x9043 flags 0x40101] (d=0, p=0)
[    7.341191] pci 0000:00:1f.2: BAR 4: reserving [io  0x9020-0x903f flags 0x40101] (d=0, p=0)
[    7.349520] pci 0000:00:1f.2: BAR 5: reserving [mem 0xdff00000-0xdff007ff flags 0x40200] (d=0, p=0)
[    7.358535] pci 0000:00:1f.3: BAR 0: reserving [mem 0x3c0ffff20000-0x3c0ffff200ff flags 0x140204] (d=0, p=0)
[    7.368331] pci 0000:00:1f.3: BAR 4: reserving [io  0x9000-0x901f flags 0x40101] (d=0, p=0)
[    7.376687] pci 0000:03:00.0: BAR 0: reserving [mem 0x3c0ffe800000-0x3c0ffeffffff flags 0x14220c] (d=0, p=0)
[    7.386486] pci 0000:03:00.0: BAR 2: reserving [mem 0x3c0ffe000000-0x3c0ffe7fffff flags 0x14220c] (d=0, p=0)
[    7.396284] pci 0000:03:00.0: BAR 4: reserving [mem 0x3c0fff010000-0x3c0fff01ffff flags 0x14220c] (d=0, p=0)
[    7.406111] pci 0000:03:00.1: BAR 0: reserving [mem 0x3c0ffd800000-0x3c0ffdffffff flags 0x14220c] (d=0, p=0)
[    7.415911] pci 0000:03:00.1: BAR 2: reserving [mem 0x3c0ffd000000-0x3c0ffd7fffff flags 0x14220c] (d=0, p=0)
[    7.425709] pci 0000:03:00.1: BAR 4: reserving [mem 0x3c0fff000000-0x3c0fff00ffff flags 0x14220c] (d=0, p=0)
[    7.435510] pci 0000:1d:00.0: BAR 0: reserving [mem 0x3c0fff87c000-0x3c0fff87ffff flags 0x14220c] (d=0, p=0)
[    7.445307] pci 0000:1d:00.0: BAR 2: reserving [mem 0x3c0fff400000-0x3c0fff7fffff flags 0x14220c] (d=0, p=0)
[    7.455109] pci 0000:1d:00.0: BAR 4: reserving [io  0x8000-0x80ff flags 0x40101] (d=0, p=0)

[    8.133716] pci 0000:00:03.0: BAR 9: assigned [mem 0x90000000-0x900fffff pref]
[    8.140920] pci 0000:00:01.0: PCI bridge to [bus 01-01]
[    8.146141] pci 0000:00:01.1: PCI bridge to [bus 02-02]
[    8.151358] pci 0000:00:02.0: PCI bridge to [bus 03-03]
[    8.156571] pci 0000:00:02.0:   bridge window [mem 0xdfe00000-0xdfefffff]
[    8.163342] pci 0000:00:02.0:   bridge window [mem 0x3c0ffd000000-0x3c0fff1fffff 64bit pref]
[    8.171759] pci 0000:00:02.2: PCI bridge to [bus 04-04]
[    8.176988] pci 0000:05:00.0: BAR 0: assigned [mem 0xdfd00000-0xdfd1ffff]
[    8.183767] pci 0000:05:00.0: BAR 0: set to [mem 0xdfd00000-0xdfd1ffff] (PCI address [0xdfd00000-0xdfd1ffff])
[    8.193649] pci 0000:05:00.0: BAR 6: assigned [mem 0x90000000-0x90003fff pref]
[    8.200853] pci 0000:00:03.0: PCI bridge to [bus 05-19]
[    8.206070] pci 0000:00:03.0:   bridge window [mem 0xdfd00000-0xdfdfffff]
[    8.212841] pci 0000:00:03.0:   bridge window [mem 0x90000000-0x900fffff pref]
[    8.220048] pci 0000:00:03.1: PCI bridge to [bus 1a-1a]
[    8.225267] pci 0000:00:03.2: PCI bridge to [bus 1b-1b]
[    8.230483] pci 0000:00:03.3: PCI bridge to [bus 1c-1c]
[    8.235705] pci 0000:00:11.0: PCI bridge to [bus 1d-1d]
[    8.240918] pci 0000:00:11.0:   bridge window [io  0x8000-0x8fff]
[    8.247000] pci 0000:00:11.0:   bridge window [mem 0xdfc00000-0xdfcfffff]
[    8.253771] pci 0000:00:11.0:   bridge window [mem 0x3c0fff400000-0x3c0fff8fffff 64bit pref]
[    8.262187] pci 0000:00:1e.0: PCI bridge to [bus 1e-1e]

[    8.298979] pci_bus 0000:00: resource 4 [io  0x0000-0x03af]
[    8.304538] pci_bus 0000:00: resource 5 [io  0x03e0-0x0cf7]
[    8.310101] pci_bus 0000:00: resource 6 [io  0x0d00-0x9fff]
[    8.315662] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000dffff]
[    8.321916] pci_bus 0000:00: resource 8 [mem 0x80000000-0xdfffffff]
[    8.328168] pci_bus 0000:00: resource 9 [mem 0x1080000000-0x3c0fffffffff]
[    8.334941] pci_bus 0000:03: resource 1 [mem 0xdfe00000-0xdfefffff]
[    8.341193] pci_bus 0000:03: resource 2 [mem 0x3c0ffd000000-0x3c0fff1fffff 64bit pref]
[    8.349090] pci_bus 0000:05: resource 1 [mem 0xdfd00000-0xdfdfffff]
[    8.355342] pci_bus 0000:05: resource 2 [mem 0x90000000-0x900fffff pref]
[    8.362029] pci_bus 0000:1d: resource 0 [io  0x8000-0x8fff]
[    8.367591] pci_bus 0000:1d: resource 1 [mem 0xdfc00000-0xdfcfffff]
[    8.373844] pci_bus 0000:1d: resource 2 [mem 0x3c0fff400000-0x3c0fff8fffff 64bit pref]
[    8.381740] pci_bus 0000:1e: resource 4 [io  0x0000-0x03af]
[    8.387304] pci_bus 0000:1e: resource 5 [io  0x03e0-0x0cf7]
[    8.392864] pci_bus 0000:1e: resource 6 [io  0x0d00-0x9fff]
[    8.398427] pci_bus 0000:1e: resource 7 [mem 0x000c0000-0x000dffff]
[    8.404678] pci_bus 0000:1e: resource 8 [mem 0x80000000-0xdfffffff]
[    8.410932] pci_bus 0000:1e: resource 9 [mem 0x1080000000-0x3c0fffffffff]


# dmesg -n8
# echo 1 > /sys/bus/pci/rescan
[  140.237870] pci_bus 0000:00: scanning bus pass 0
[  140.242551] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 0
[  140.249249] pci 0000:00:01.0: check if busn 01-01 is in busn_res: [bus 00-7e]
[  140.256377] pci 0000:00:01.0: bus configuration invalid, reconfiguring
[  140.262912] pci 0000:00:01.1: scanning [bus 02-02] behind bridge, pass 0
[  140.269593] pci 0000:00:01.1: check if busn 02-02 is in busn_res: [bus 00-7e]
[  140.276721] pci 0000:00:01.1: bus configuration invalid, reconfiguring
[  140.283244] pci 0000:00:02.0: scanning [bus 03-03] behind bridge, pass 0
[  140.289944] pci 0000:00:02.0: check if busn 03-03 is in busn_res: [bus 00-7e]
[  140.297070] pci 0000:00:02.0: bus configuration invalid, reconfiguring
[  140.303592] pci 0000:00:02.2: scanning [bus 04-04] behind bridge, pass 0
[  140.310295] pci 0000:00:02.2: check if busn 04-04 is in busn_res: [bus 00-7e]
[  140.317422] pci 0000:00:02.2: bus configuration invalid, reconfiguring
[  140.323963] pci 0000:00:03.0: scanning [bus 05-19] behind bridge, pass 0
[  140.330675] pci 0000:00:03.0: check if busn 05-19 is in busn_res: [bus 00-7e]
[  140.337808] pci 0000:00:03.0: bus configuration invalid, reconfiguring
[  140.344329] pci 0000:00:03.1: scanning [bus 1a-1a] behind bridge, pass 0
[  140.351041] pci 0000:00:03.1: check if busn 1a-1a is in busn_res: [bus 00-7e]
[  140.358175] pci 0000:00:03.1: bus configuration invalid, reconfiguring
[  140.364688] pci 0000:00:03.2: scanning [bus 1b-1b] behind bridge, pass 0
[  140.371383] pci 0000:00:03.2: check if busn 1b-1b is in busn_res: [bus 00-7e]
[  140.378510] pci 0000:00:03.2: bus configuration invalid, reconfiguring
[  140.385043] pci 0000:00:03.3: scanning [bus 1c-1c] behind bridge, pass 0
[  140.391733] pci 0000:00:03.3: check if busn 1c-1c is in busn_res: [bus 00-7e]
[  140.398868] pci 0000:00:03.3: bus configuration invalid, reconfiguring
[  140.405399] pci 0000:00:11.0: scanning [bus 1d-1d] behind bridge, pass 0
[  140.412099] pci 0000:00:11.0: check if busn 1d-1d is in busn_res: [bus 00-7e]
[  140.419234] pci 0000:00:11.0: bus configuration invalid, reconfiguring
[  140.425762] pci 0000:00:1e.0: scanning [bus 1e-1e] behind bridge, pass 0
[  140.432454] pci 0000:00:1e.0: check if busn 1e-1e is in busn_res: [bus 00-7e]
[  140.439571] pci 0000:00:1e.0: bus configuration invalid, reconfiguring
[  140.446102] pci_bus 0000:00: bus scan returning with max=00 pass 0
[  140.452267] pci_bus 0000:00: scanning bus pass 1
[  140.456932] pci 0000:00:01.0: scanning [bus 00-00] behind bridge, pass 1
[  140.463616] pci 0000:00:01.0: find free busn in busn_res: [bus 00-7e]
[  140.470090] pci_bus 0000:1f: busn_res: [bus 1f-7e] is inserted under [bus 00-7e]
[  140.477476] pci_bus 0000:1f: scanning bus pass 0
[  140.482088] pci_bus 0000:1f: fixups for bus pass 0
[  140.486894] pci 0000:00:01.0: PCI bridge to [bus 1f-7e]
[  140.492116] pci_bus 0000:1f: bus scan returning with max=1f pass 0
[  140.498292] pci_bus 0000:1f: scanning bus pass 1
[  140.502906] pci_bus 0000:1f: fixups for bus pass 1
[  140.507702] pci 0000:00:01.0: PCI bridge to [bus 1f-7e]
[  140.512943] pci_bus 0000:1f: bus scan returning with max=1f pass 1
[  140.519130] pci_bus 0000:1f: busn_res: [bus 1f-7e] end updated to [bus 1f]
[  140.525997] pci 0000:00:01.1: scanning [bus 00-00] behind bridge, pass 1
[  140.532683] pci 0000:00:01.1: find free busn in busn_res: [bus 00-7e]
[  140.539158] pci_bus 0000:20: busn_res: [bus 20-7e] is inserted under [bus 00-7e]
[  140.546553] pci_bus 0000:20: scanning bus pass 0
[  140.551178] pci_bus 0000:20: fixups for bus pass 0
[  140.555980] pci 0000:00:01.1: PCI bridge to [bus 20-7e]
[  140.561218] pci_bus 0000:20: bus scan returning with max=20 pass 0
[  140.567388] pci_bus 0000:20: scanning bus pass 1
[  140.572007] pci_bus 0000:20: fixups for bus pass 1
[  140.576790] pci 0000:00:01.1: PCI bridge to [bus 20-7e]
[  140.582011] pci_bus 0000:20: bus scan returning with max=20 pass 1
[  140.588191] pci_bus 0000:20: busn_res: [bus 20-7e] end updated to [bus 20]
[  140.595061] pci 0000:00:02.0: scanning [bus 00-00] behind bridge, pass 1
[  140.601745] pci 0000:00:02.0: find free busn in busn_res: [bus 00-7e]
[  140.608212] pci_bus 0000:21: busn_res: [bus 21-7e] is inserted under [bus 00-7e]
[  140.615607] pci_bus 0000:21: scanning bus pass 0
[  140.620278] pci 0000:21:00.0: [14e4:1662] type 0 class 0x000200
[  140.632518] pci 0000:21:00.0: reg 10: [mem 0x3c0ffe800000-0x3c0ffeffffff 64bit pref]
[  140.640299] pci 0000:21:00.0: reg 18: [mem 0x3c0ffe000000-0x3c0ffe7fffff 64bit pref]
[  140.648082] pci 0000:21:00.0: reg 20: [mem 0x3c0fff010000-0x3c0fff01ffff 64bit pref]
[  140.655845] pci 0000:21:00.0: reg 30: [mem 0xdfe20000-0xdfe3ffff pref]
[  140.679539] pci 0000:21:00.1: [14e4:1662] type 0 class 0x000200
[  140.691800] pci 0000:21:00.1: reg 10: [mem 0x3c0ffd800000-0x3c0ffdffffff 64bit pref]
[  140.699573] pci 0000:21:00.1: reg 18: [mem 0x3c0ffd000000-0x3c0ffd7fffff 64bit pref]
[  140.707355] pci 0000:21:00.1: reg 20: [mem 0x3c0fff000000-0x3c0fff00ffff 64bit pref]
[  140.715120] pci 0000:21:00.1: reg 30: [mem 0xdfe00000-0xdfe1ffff pref]
[  140.738779] pci_bus 0000:21: fixups for bus pass 0
[  140.743571] pci 0000:00:02.0: PCI bridge to [bus 21-7e]
[  140.748805] pci 0000:00:02.0:   bridge window [mem 0xdfe00000-0xdfefffff]
[  140.755587] pci 0000:00:02.0:   bridge window [mem 0x3c0ffd000000-0x3c0fff1fffff 64bit pref]
[  140.764010] pci_bus 0000:21: bus scan returning with max=21 pass 0
[  140.770193] pci_bus 0000:21: scanning bus pass 1
[  140.774861] pci_bus 0000:21: fixups for bus pass 1
[  140.779652] pci 0000:00:02.0: PCI bridge to [bus 21-7e]
[  140.784890] pci 0000:00:02.0:   bridge window [mem 0xdfe00000-0xdfefffff]
[  140.791680] pci 0000:00:02.0:   bridge window [mem 0x3c0ffd000000-0x3c0fff1fffff 64bit pref]
[  140.800101] pci_bus 0000:21: bus scan returning with max=21 pass 1
[  140.806278] pci_bus 0000:21: busn_res: [bus 21-7e] end updated to [bus 21]
[  140.813146] pci 0000:00:02.2: scanning [bus 00-00] behind bridge, pass 1
[  140.819848] pci 0000:00:02.2: find free busn in busn_res: [bus 00-7e]
[  140.826317] pci_bus 0000:22: busn_res: [bus 22-7e] is inserted under [bus 00-7e]
[  140.833706] pci_bus 0000:22: scanning bus pass 0
[  140.838316] pci_bus 0000:22: fixups for bus pass 0
[  140.843104] pci 0000:00:02.2: PCI bridge to [bus 22-7e]
[  140.848344] pci_bus 0000:22: bus scan returning with max=22 pass 0
[  140.854514] pci_bus 0000:22: scanning bus pass 1
[  140.859142] pci_bus 0000:22: fixups for bus pass 1
[  140.863933] pci 0000:00:02.2: PCI bridge to [bus 22-7e]
[  140.869173] pci_bus 0000:22: bus scan returning with max=22 pass 1
[  140.875351] pci_bus 0000:22: busn_res: [bus 22-7e] end updated to [bus 22]
[  140.882217] pci 0000:00:03.0: scanning [bus 00-00] behind bridge, pass 1
[  140.888906] pci 0000:00:03.0: find free busn in busn_res: [bus 00-7e]
[  140.895371] pci_bus 0000:23: busn_res: [bus 23-7e] is inserted under [bus 00-7e]
[  140.902757] pci_bus 0000:23: scanning bus pass 0
[  140.907384] pci 0000:23:00.0: [10b5:8624] type 0 class 0x000680
[  140.919575] pci 0000:23:00.0: reg 10: [mem 0xdfd00000-0xdfd1ffff]
[  140.925676] pci 0000:23:00.0: reg 30: [mem 0x00000000-0x00003fff pref]
[  140.938935] pci_bus 0000:23: fixups for bus pass 0
[  140.943718] pci 0000:00:03.0: PCI bridge to [bus 23-7e]
[  140.948950] pci 0000:00:03.0:   bridge window [mem 0xdfd00000-0xdfdfffff]
[  140.955733] pci 0000:00:03.0:   bridge window [mem 0x90000000-0x900fffff 64bit pref]
[  140.963455] pci_bus 0000:23: bus scan returning with max=23 pass 0
[  140.969638] pci_bus 0000:23: scanning bus pass 1
[  140.974271] pci_bus 0000:23: fixups for bus pass 1
[  140.979073] pci 0000:00:03.0: PCI bridge to [bus 23-7e]
[  140.984310] pci 0000:00:03.0:   bridge window [mem 0xdfd00000-0xdfdfffff]
[  140.991090] pci 0000:00:03.0:   bridge window [mem 0x90000000-0x900fffff 64bit pref]
[  140.998830] pci_bus 0000:23: bus scan returning with max=23 pass 1
[  141.005015] pci_bus 0000:23: busn_res: [bus 23-7e] end updated to [bus 23]
[  141.011883] pci 0000:00:03.1: scanning [bus 00-00] behind bridge, pass 1
[  141.018577] pci 0000:00:03.1: find free busn in busn_res: [bus 00-7e]
[  141.025063] pci_bus 0000:24: busn_res: [bus 24-7e] is inserted under [bus 00-7e]
[  141.032439] pci_bus 0000:24: scanning bus pass 0
[  141.037057] pci_bus 0000:24: fixups for bus pass 0
[  141.041840] pci 0000:00:03.1: PCI bridge to [bus 24-7e]
[  141.047080] pci_bus 0000:24: bus scan returning with max=24 pass 0
[  141.053250] pci_bus 0000:24: scanning bus pass 1
[  141.057878] pci_bus 0000:24: fixups for bus pass 1
[  141.062668] pci 0000:00:03.1: PCI bridge to [bus 24-7e]
[  141.067905] pci_bus 0000:24: bus scan returning with max=24 pass 1
[  141.074087] pci_bus 0000:24: busn_res: [bus 24-7e] end updated to [bus 24]
[  141.080964] pci 0000:00:03.2: scanning [bus 00-00] behind bridge, pass 1
[  141.087666] pci 0000:00:03.2: find free busn in busn_res: [bus 00-7e]
[  141.094137] pci_bus 0000:25: busn_res: [bus 25-7e] is inserted under [bus 00-7e]
[  141.101515] pci_bus 0000:25: scanning bus pass 0
[  141.106141] pci_bus 0000:25: fixups for bus pass 0
[  141.110940] pci 0000:00:03.2: PCI bridge to [bus 25-7e]
[  141.116164] pci_bus 0000:25: bus scan returning with max=25 pass 0
[  141.122358] pci_bus 0000:25: scanning bus pass 1
[  141.126978] pci_bus 0000:25: fixups for bus pass 1
[  141.131768] pci 0000:00:03.2: PCI bridge to [bus 25-7e]
[  141.137006] pci_bus 0000:25: bus scan returning with max=25 pass 1
[  141.143169] pci_bus 0000:25: busn_res: [bus 25-7e] end updated to [bus 25]
[  141.150046] pci 0000:00:03.3: scanning [bus 00-00] behind bridge, pass 1
[  141.156759] pci 0000:00:03.3: find free busn in busn_res: [bus 00-7e]
[  141.163216] pci_bus 0000:26: busn_res: [bus 26-7e] is inserted under [bus 00-7e]
[  141.170606] pci_bus 0000:26: scanning bus pass 0
[  141.175215] pci_bus 0000:26: fixups for bus pass 0
[  141.180020] pci 0000:00:03.3: PCI bridge to [bus 26-7e]
[  141.185260] pci_bus 0000:26: bus scan returning with max=26 pass 0
[  141.191446] pci_bus 0000:26: scanning bus pass 1
[  141.196074] pci_bus 0000:26: fixups for bus pass 1
[  141.200873] pci 0000:00:03.3: PCI bridge to [bus 26-7e]
[  141.206113] pci_bus 0000:26: bus scan returning with max=26 pass 1
[  141.212284] pci_bus 0000:26: busn_res: [bus 26-7e] end updated to [bus 26]
[  141.219159] pci 0000:00:11.0: scanning [bus 00-00] behind bridge, pass 1
[  141.225857] pci 0000:00:11.0: find free busn in busn_res: [bus 00-7e]
[  141.232334] pci_bus 0000:27: busn_res: [bus 27-7e] is inserted under [bus 00-7e]
[  141.239718] pci_bus 0000:27: scanning bus pass 0
[  141.244359] pci 0000:27:00.0: [8086:1d69] type 0 class 0x000107
[  141.256574] pci 0000:27:00.0: reg 10: [mem 0x3c0fff87c000-0x3c0fff87ffff 64bit pref]
[  141.264322] pci 0000:27:00.0: reg 18: [mem 0x3c0fff400000-0x3c0fff7fffff 64bit pref]
[  141.272064] pci 0000:27:00.0: reg 20: [io  0x8000-0x80ff]
[  141.291221] pci_bus 0000:27: fixups for bus pass 0
[  141.296023] pci 0000:00:11.0: PCI bridge to [bus 27-7e]
[  141.301241] pci 0000:00:11.0:   bridge window [io  0x8000-0x8fff]
[  141.307336] pci 0000:00:11.0:   bridge window [mem 0xdfc00000-0xdfcfffff]
[  141.314119] pci 0000:00:11.0:   bridge window [mem 0x3c0fff400000-0x3c0fff8fffff 64bit pref]
[  141.322547] pci_bus 0000:27: bus scan returning with max=27 pass 0
[  141.328729] pci_bus 0000:27: scanning bus pass 1
[  141.333353] pci_bus 0000:27: fixups for bus pass 1
[  141.338139] pci 0000:00:11.0: PCI bridge to [bus 27-7e]
[  141.343358] pci 0000:00:11.0:   bridge window [io  0x8000-0x8fff]
[  141.349461] pci 0000:00:11.0:   bridge window [mem 0xdfc00000-0xdfcfffff]
[  141.356262] pci 0000:00:11.0:   bridge window [mem 0x3c0fff400000-0x3c0fff8fffff 64bit pref]
[  141.364674] pci_bus 0000:27: bus scan returning with max=27 pass 1
[  141.370850] pci_bus 0000:27: busn_res: [bus 27-7e] end updated to [bus 27]
[  141.377716] pci 0000:00:1e.0: scanning [bus 00-00] behind bridge, pass 1
[  141.384420] pci 0000:00:1e.0: find free busn in busn_res: [bus 00-7e]
[  141.390872] pci_bus 0000:28: busn_res: [bus 28-7e] is inserted under [bus 00-7e]
[  141.398262] pci_bus 0000:28: scanning bus pass 0
[  141.402918] pci_bus 0000:28: fixups for bus pass 0
[  141.407708] pci 0000:00:1e.0: PCI bridge to [bus 28-7e] (subtractive decode)
[  141.414748] pci 0000:00:1e.0:   bridge window [io  0x0000-0x03af] (subtractive decode)
[  141.422659] pci 0000:00:1e.0:   bridge window [io  0x03e0-0x0cf7] (subtractive decode)
[  141.430573] pci 0000:00:1e.0:   bridge window [io  0x0d00-0x9fff] (subtractive decode)
[  141.438471] pci 0000:00:1e.0:   bridge window [mem 0x000c0000-0x000dffff] (subtractive decode)
[  141.447075] pci 0000:00:1e.0:   bridge window [mem 0x80000000-0xdfffffff] (subtractive decode)
[  141.455665] pci 0000:00:1e.0:   bridge window [mem 0x1080000000-0x3c0fffffffff] (subtractive decode)
[  141.464778] pci_bus 0000:28: bus scan returning with max=28 pass 0
[  141.470961] pci_bus 0000:28: scanning bus pass 1
[  141.475617] pci_bus 0000:28: fixups for bus pass 1
[  141.480421] pci 0000:00:1e.0: PCI bridge to [bus 28-7e] (subtractive decode)
[  141.487463] pci 0000:00:1e.0:   bridge window [io  0x0000-0x03af] (subtractive decode)
[  141.495374] pci 0000:00:1e.0:   bridge window [io  0x03e0-0x0cf7] (subtractive decode)
[  141.503280] pci 0000:00:1e.0:   bridge window [io  0x0d00-0x9fff] (subtractive decode)
[  141.511192] pci 0000:00:1e.0:   bridge window [mem 0x000c0000-0x000dffff] (subtractive decode)
[  141.519795] pci 0000:00:1e.0:   bridge window [mem 0x80000000-0xdfffffff] (subtractive decode)
[  141.528397] pci 0000:00:1e.0:   bridge window [mem 0x1080000000-0x3c0fffffffff] (subtractive decode)
[  141.537529] pci_bus 0000:28: bus scan returning with max=28 pass 1
[  141.543704] pci_bus 0000:28: busn_res: [bus 28-7e] end updated to [bus 28]
[  141.550561] pci_bus 0000:00: bus scan returning with max=28 pass 1
[  141.556799] pci 0000:21:00.0: BAR 0: can't assign mem pref (size 0x800000)
[  141.563654] pci 0000:21:00.0: BAR 2: can't assign mem pref (size 0x800000)
[  141.570519] pci 0000:21:00.1: BAR 0: can't assign mem pref (size 0x800000)
[  141.577379] pci 0000:21:00.1: BAR 2: can't assign mem pref (size 0x800000)
[  141.584245] pci 0000:21:00.0: BAR 6: assigned [mem 0xdfe40000-0xdfe5ffff pref]
[  141.591457] pci 0000:21:00.1: BAR 6: assigned [mem 0xdfe60000-0xdfe7ffff pref]
[  141.598678] pci 0000:21:00.0: BAR 4: assigned [mem 0x3c0fff020000-0x3c0fff02ffff 64bit pref]
[  141.607154] pci 0000:21:00.0: BAR 4: set to [mem 0x3c0fff020000-0x3c0fff02ffff 64bit pref] (PCI address [0x3c0fff020000-0x3c0fff02ffff])
[  141.619383] pci 0000:21:00.1: BAR 4: assigned [mem 0x3c0fff030000-0x3c0fff03ffff 64bit pref]
[  141.627844] pci 0000:21:00.1: BAR 4: set to [mem 0x3c0fff030000-0x3c0fff03ffff 64bit pref] (PCI address [0x3c0fff030000-0x3c0fff03ffff])
[  141.640087] pci 0000:23:00.0: BAR 0: assigned [mem 0xdfd20000-0xdfd3ffff]
[  141.646862] pci 0000:23:00.0: BAR 0: set to [mem 0xdfd20000-0xdfd3ffff] (PCI address [0xdfd20000-0xdfd3ffff])
[  141.656763] pci 0000:23:00.0: BAR 6: assigned [mem 0x90004000-0x90007fff pref]
[  141.663978] pci 0000:27:00.0: BAR 2: can't assign mem pref (size 0x400000)
[  141.670837] pci 0000:27:00.0: BAR 0: assigned [mem 0x3c0fff800000-0x3c0fff803fff 64bit pref]
[  141.679270] pci 0000:27:00.0: BAR 0: set to [mem 0x3c0fff800000-0x3c0fff803fff 64bit pref] (PCI address [0x3c0fff800000-0x3c0fff803fff])
[  141.691503] pci 0000:27:00.0: BAR 4: assigned [io  0x8400-0x84ff]
[  141.697604] pci 0000:27:00.0: BAR 4: set to [io  0x8400-0x84ff] (PCI address [0x8400-0x84ff])
[  141.706445] bnx2x 0000:21:00.0: Cannot find PCI device base address, aborting
[  141.713778] bnx2x 0000:21:00.1: Cannot find PCI device base address, aborting

# [  149.111070] ------------[ cut here ]------------
[  149.115721] WARNING: at net/sched/sch_generic.c:256 dev_watchdog+0x259/0x270()
[  149.122932] Hardware name: XXX
[  149.126339] NETDEV WATCHDOG: eth0 (bnx2x): transmit queue 2 timed out
[  149.132784] Modules linked in: w1_therm ds2482 wire msr cpuid bnx2x crc32c libcrc32c mdio ipv6 genrtc
[  149.142259] Pid: 0, comm: swapper/11 Not tainted 3.3.0-smp-DEV #4
[  149.148349] Call Trace:
[  149.150816]  <IRQ>  [<ffffffff8108de33>] warn_slowpath_common+0x83/0x120
[  149.157545]  [<ffffffff8108df86>] warn_slowpath_fmt+0x46/0x60
[  149.163282]  [<ffffffff810af15a>] ? __queue_work+0x15a/0x4b0
[  149.168928]  [<ffffffff81558259>] dev_watchdog+0x259/0x270
[  149.174412]  [<ffffffff8109fe2e>] run_timer_softirq+0x13e/0x8b0
[  149.180344]  [<ffffffff810c8ace>] ? scheduler_tick+0x1fe/0x2f0
[  149.186174]  [<ffffffff81558000>] ? __netdev_watchdog_up+0x80/0x80
[  149.192359]  [<ffffffff810764bd>] ? lapic_next_event+0x1d/0x30
[  149.198180]  [<ffffffff81095981>] __do_softirq+0xb1/0x1e0
[  149.203594]  [<ffffffff810e1114>] ? tick_program_event+0x24/0x30
[  149.209604]  [<ffffffff815e9d8c>] call_softirq+0x1c/0x30
[  149.214932]  [<ffffffff810580b5>] do_softirq+0x55/0x90
[  149.220068]  [<ffffffff8109578d>] irq_exit+0xbd/0xe0
[  149.225040]  [<ffffffff815ea50e>] smp_apic_timer_interrupt+0x6e/0x99
[  149.231405]  [<ffffffff815e944b>] apic_timer_interrupt+0x6b/0x70
[  149.237408]  <EOI>  [<ffffffff814f0aa5>] ? poll_idle+0x45/0x90
[  149.243289]  [<ffffffff814f0a7c>] ? poll_idle+0x1c/0x90
[  149.248505]  [<ffffffff810bd578>] ? hrtimer_start+0x18/0x20
[  149.254079]  [<ffffffff814f05a0>] cpuidle_idle_call+0xe0/0x200
[  149.259917]  [<ffffffff81055fd6>] cpu_idle+0x96/0xf0
[  149.264903]  [<ffffffff818f4f8c>] start_secondary+0x1d1/0x1d5
[  149.270640] ---[ end trace 628fdd480099dccf ]---
[  149.285310] bnx2x: [bnx2x_stats_comp:143(eth0)]timeout waiting for stats finished
[  149.302817] bnx2x: [bnx2x_stats_comp:143(eth0)]timeout waiting for stats finished
[  150.310050] bnx2x: [bnx2x_clean_tx_queue:1375(eth0)]timeout waiting for queue[0]: txdata->tx_pkt_prod(232) != txdata->tx_pkt_cons(229)
[  151.321738] bnx2x: [bnx2x_clean_tx_queue:1375(eth0)]timeout waiting for queue[1]: txdata->tx_pkt_prod(242) != txdata->tx_pkt_cons(239)
[  152.335656] bnx2x: [bnx2x_clean_tx_queue:1375(eth0)]timeout waiting for queue[2]: txdata->tx_pkt_prod(202) != txdata->tx_pkt_cons(197)
[  153.347354] bnx2x: [bnx2x_clean_tx_queue:1375(eth0)]timeout waiting for queue[3]: txdata->tx_pkt_prod(231) != txdata->tx_pkt_cons(228)
[  158.359128] bnx2x: [bnx2x_state_wait:337(eth0)]timeout waiting for state 0
[  158.365997] bnx2x: [bnx2x_del_all_macs:7192(eth0)]Failed to delete MACs: -16
[  158.373024] bnx2x: [bnx2x_chip_cleanup:7965(eth0)]Failed to schedule DEL commands for UC MACs list: -16
[  163.514324] bnx2x: [bnx2x_state_wait:337(eth0)]timeout waiting for state 9
[  168.520447] bnx2x: [bnx2x_state_wait:337(eth0)]timeout waiting for state 2
[  168.527311] bnx2x: [bnx2x_func_stop:7771(eth0)]FUNC_STOP ramrod failed. Running a dry transaction
[  168.735893] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  168.942083] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  169.262007] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  169.468218] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  169.674431] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  169.880637] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  170.086851] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  170.293063] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  170.499273] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  170.705488] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  170.911694] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  171.117904] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  171.324118] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  171.530298] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  171.736512] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  171.942725] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  172.148931] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  172.355133] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  172.561328] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  172.767528] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  172.973724] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  173.179904] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  173.386104] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  173.592335] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  173.798531] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  174.004730] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  174.210929] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  174.417126] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  174.623329] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  174.829517] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  175.035714] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  175.241910] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  175.448104] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  175.654301] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  175.860505] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  176.066703] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  176.272902] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  176.479073] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  176.685300] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  176.891502] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  177.097697] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  177.303901] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  177.510101] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  177.716299] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  177.922494] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  178.128683] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  178.334883] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  178.541083] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  178.747284] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  178.953478] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  179.159675] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  179.365901] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  179.572098] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  179.778294] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  179.984500] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  180.190696] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  180.396900] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  180.603101] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  180.809305] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  181.015504] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  181.221705] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  181.427854] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  181.634052] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  181.840253] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  182.046452] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  182.252653] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  182.458851] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  182.665045] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  182.871238] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  183.077410] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  183.283608] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  183.489802] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  183.696002] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  183.902205] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  184.108404] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  184.314602] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  184.520802] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  184.727020] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  184.933221] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  185.139422] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  185.345622] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  185.551824] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  185.758025] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  185.964255] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  186.170457] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  186.376631] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  186.582836] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  186.789037] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  186.995248] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  187.201448] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  187.407645] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  187.613839] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  187.820036] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  188.026192] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  188.232389] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  188.438597] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  188.644799] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  188.850999] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  189.057197] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  189.263400] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  189.469605] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  189.675798] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  189.881996] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  190.088190] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  190.294390] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  190.500589] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  190.706791] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  190.912987] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  191.119187] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  191.325358] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  191.531556] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  191.737756] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  191.943950] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  192.150145] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  192.356341] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  192.562542] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  192.768740] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  192.974921] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  193.181125] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  193.387318] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  193.593522] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  193.799721] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  194.005927] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  194.212129] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  194.418334] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  194.624529] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  194.830727] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  195.036927] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  195.243128] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  195.449327] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  195.655528] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  195.861725] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  196.067923] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  196.274087] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  196.480287] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  196.686494] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  196.892692] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  197.098890] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  197.305084] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  197.511289] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  197.717492] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  197.923646] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  198.129848] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  198.336051] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  198.542252] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  198.748454] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  198.954656] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  199.160858] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  199.367056] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  199.573208] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  199.779411] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  199.985611] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  200.191813] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  200.398010] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  200.604212] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  200.810411] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  201.016603] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  201.222769] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  201.428964] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  201.635189] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  201.841385] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  202.047590] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  202.253794] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  202.460023] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  202.666221] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  202.872375] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  203.078607] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  203.284802] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  203.491030] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  203.697265] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  203.903469] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  204.109665] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  204.315865] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  204.522037] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  204.728240] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  204.934440] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  205.140640] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  205.346845] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  205.553046] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  205.759242] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  205.965450] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  206.171647] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  206.377848] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  206.584045] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  206.790245] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  206.996448] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  207.202647] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  207.408845] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  207.615043] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  207.821207] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  208.027405] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  208.233602] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  208.439803] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  208.646002] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  208.852196] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  209.058390] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  209.264591] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  209.470813] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  209.677015] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  209.883214] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  210.089414] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  210.295613] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  210.501809] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  210.708009] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  210.914209] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  211.120376] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  211.326573] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  211.532772] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  211.738969] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  211.945165] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  212.151369] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  212.357598] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  212.563800] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  212.769984] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  212.976181] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  213.182376] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  213.388570] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  213.594765] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  213.800960] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  214.007163] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  214.213359] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  214.419543] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  214.625737] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  214.831934] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  215.038129] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  215.244328] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  215.450524] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  215.656720] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  215.862913] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  216.069100] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  216.275299] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  216.481497] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  216.687699] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  216.893894] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  217.100091] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  217.306298] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  217.512495] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  217.718662] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  217.924866] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  218.131063] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  218.337256] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  218.543460] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  218.749660] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  218.955855] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  219.162050] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  219.368223] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  219.574422] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  219.780617] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  219.986821] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  220.193019] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  220.399222] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  220.605416] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  220.811612] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  221.017782] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  221.223981] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  221.430182] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  221.636379] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  221.842575] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  222.048776] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  222.254976] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  222.461180] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  222.667338] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  222.873542] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  223.079743] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  223.285941] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  223.492134] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  223.698338] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  223.904535] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  224.110768] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  224.316952] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  224.523152] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  224.729350] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  224.935544] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  225.141742] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  225.347941] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  225.554142] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  225.760339] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  225.966510] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  226.172701] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  226.378899] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  226.585132] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  226.791339] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  226.997541] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  227.203739] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  227.409940] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  227.616119] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  227.822321] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  228.028523] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  228.234725] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  228.440927] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  228.647132] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  228.853331] bnx2x: [bnx2x_issue_dmae_with_comp:472(eth0)]DMAE timeout!
[  228.931828] INFO: rcu_sched detected stall on CPU 11 (t=60000 jiffies)
[  228.938334] sending NMI to all CPUs:
[  228.941911] NMI backtrace for cpu 0
[  228.945399] CPU 0 
[  228.947239] Modules linked in: w1_therm ds2482 wire msr cpuid bnx2x crc32c libcrc32c mdio ipv6 genrtc
[  228.956838] 
[  228.958328] Pid: 0, comm: swapper/0 Tainted: G        W    3.3.0-smp-DEV #4 XXX
[  228.967492] RIP: 0010:[<ffffffff814f0aa5>]  [<ffffffff814f0aa5>] poll_idle+0x45/0x90
[  228.975233] RSP: 0000:ffffffff81801eb8  EFLAGS: 00000246
[  228.980532] RAX: 0000000400000000 RBX: 0000000000000000 RCX: 0000000000000018
[  228.987648] RDX: ffffffff81800010 RSI: 0000000000000000 RDI: ffffffff81815a00
[  228.994765] RBP: ffffffff81801ef8 R08: ffff88087fc0f760 R09: 0000000000000000
[  229.001881] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88107c71c820
[  229.008996] R13: 00000033da6ec38c R14: ffffffffffffffff R15: 0000000000000000
[  229.016113] FS:  0000000000000000(0000) GS:ffff88087fc00000(0000) knlGS:0000000000000000
[  229.024179] CS:  0010 DS: 0000 ES: 0000 CR0: 000000008005003b
[  229.029914] CR2: 00000000f74c1a80 CR3: 000000105697c000 CR4: 00000000000406f0
[  229.037029] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[  229.044138] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
[  229.051256] Process swapper/0 (pid: 0, threadinfo ffffffff81800000, task ffffffff8180e020)
[  229.059496] Stack:
[  229.061518]  0000000000000000 ffff88087fc0ce00 ffffffff81801ed8 ffffffff810cdb71

^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn
  2012-01-31 23:30     ` Bjorn Helgaas
@ 2012-02-01  0:27       ` Yinghai Lu
  0 siblings, 0 replies; 19+ messages in thread
From: Yinghai Lu @ 2012-02-01  0:27 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck, Andrew Morton,
	Linus Torvalds, linux-pci, linux-kernel, linux-arch

On Tue, Jan 31, 2012 at 3:30 PM, Bjorn Helgaas <bhelgaas@google.com> wrote:
> Thanks.  I tried this, and it blew up as soon as I did a rescan.  More
> complete console log attached.
>
> # echo 1 > /sys/bus/pci/rescan
> [  140.237870] pci_bus 0000:00: scanning bus pass 0
> [  140.242551] pci 0000:00:01.0: scanning [bus 01-01] behind bridge, pass 0
> [  140.249249] pci 0000:00:01.0: check if busn 01-01 is in busn_res: [bus 00-7e]
> [  140.256377] pci 0000:00:01.0: bus configuration invalid, reconfiguring
> [  140.262912] pci 0000:00:01.1: scanning [bus 02-02] behind bridge, pass 0
> [  140.269593] pci 0000:00:01.1: check if busn 02-02 is in busn_res: [bus 00-7e]
> [  140.276721] pci 0000:00:01.1: bus configuration invalid, reconfiguring

did not try this test case.

will check that .

Thanks

Yinghai

^ permalink raw reply	[flat|nested] 19+ messages in thread

end of thread, other threads:[~2012-02-01  0:27 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2012-01-31  7:42 [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Yinghai Lu
2012-01-31  7:42 ` [PATCH 01/14] Make %pR could handle bus resource with domain Yinghai Lu
2012-01-31  7:42 ` [PATCH 02/14] PCI: Add iobusn_resource Yinghai Lu
2012-01-31  7:42 ` [PATCH 03/14] PCI: Add busn_res operation functions Yinghai Lu
2012-01-31  7:42 ` [PATCH 04/14] PCI: Add busn_res tracking in core Yinghai Lu
2012-01-31  7:42 ` [PATCH 05/14] PCI, x86: Register busn_res for root buses Yinghai Lu
2012-01-31  7:42 ` [PATCH 06/14] PCI, ia64: " Yinghai Lu
2012-01-31  7:42 ` [PATCH 07/14] PCI, powerpc: " Yinghai Lu
2012-01-31  7:42 ` [PATCH 08/14] PCI, parisc: " Yinghai Lu
2012-01-31  7:42 ` [PATCH 09/14] PCI: Add pci_bus_extend/shrink_top() Yinghai Lu
2012-01-31  7:42 ` [PATCH 10/14] PCI: Probe safe range that we can use for unassigned bridge Yinghai Lu
2012-01-31  7:42 ` [PATCH 11/14] PCI: Strict checking of valid range for bridge Yinghai Lu
2012-01-31  7:42 ` [PATCH 12/14] PCI: Allocate bus range instead of use max blindly Yinghai Lu
2012-01-31  7:42 ` [PATCH 13/14] PCI: kill pci_fixup_parent_subordinate_busnr() Yinghai Lu
2012-01-31  7:42 ` [PATCH 14/14] PCI: Seperate child bus scanning to two passes overall Yinghai Lu
2012-01-31 17:49 ` [PATCH -v3 0/14] PCI: allocate pci bus num range for unassigned bridge busn Bjorn Helgaas
2012-01-31 18:56   ` Yinghai Lu
2012-01-31 23:30     ` Bjorn Helgaas
2012-02-01  0:27       ` Yinghai Lu

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