From: Evan Green <evgreen@chromium.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-pci@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] PCI/MSI: Avoid torn updates to MSI pairs
Date: Fri, 17 Jan 2020 16:27:37 -0800 [thread overview]
Message-ID: <CAE=gft7mM-YUmuL=opwgJYy_o4=bhb=iO7_SWQWahhbJ8z=95A@mail.gmail.com> (raw)
In-Reply-To: <20200116133102.1.I9c7e72144ef639cc135ea33ef332852a6b33730f@changeid>
On Thu, Jan 16, 2020 at 1:31 PM Evan Green <evgreen@chromium.org> wrote:
>
> __pci_write_msi_msg() updates three registers in the device: address
> high, address low, and data. On x86 systems, address low contains
> CPU targeting info, and data contains the vector. The order of writes
> is address, then data.
>
> This is problematic if an interrupt comes in after address has
> been written, but before data is updated, and the SMP affinity of
> the interrupt is changing. In this case, the interrupt targets the
> wrong vector on the new CPU.
>
> This case is pretty easy to stumble into using xhci and CPU hotplugging.
> Create a script that targets interrupts at a set of cores and then
> offlines those cores. Put some stress on USB, and then watch xhci lose
> an interrupt and die.
>
> Avoid this by disabling MSIs during the update.
>
> Signed-off-by: Evan Green <evgreen@chromium.org>
Note to reviewers: I posted a v2 of this patch with some improvements here:
https://lore.kernel.org/lkml/20200117162444.v2.1.I9c7e72144ef639cc135ea33ef332852a6b33730f@changeid/T/#u
next prev parent reply other threads:[~2020-01-18 0:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-16 21:31 [PATCH] PCI/MSI: Avoid torn updates to MSI pairs Evan Green
2020-01-18 0:27 ` Evan Green [this message]
2020-01-22 17:28 ` Bjorn Helgaas
2020-01-22 18:26 ` Evan Green
2020-01-22 23:37 ` Thomas Gleixner
2020-01-23 0:07 ` Evan Green
2020-01-23 8:42 ` Thomas Gleixner
2020-01-23 17:55 ` Evan Green
2020-01-23 23:47 ` Thomas Gleixner
2020-01-22 18:52 ` Marc Zyngier
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