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[209.85.167.49]) by smtp.gmail.com with ESMTPSA id a18sm3256659lfb.57.2019.02.07.12.29.29 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Feb 2019 12:29:29 -0800 (PST) Received: by mail-lf1-f49.google.com with SMTP id q11so919359lfd.3 for ; Thu, 07 Feb 2019 12:29:29 -0800 (PST) X-Received: by 2002:a19:aa87:: with SMTP id t129mr11683850lfe.139.1549571368976; Thu, 07 Feb 2019 12:29:28 -0800 (PST) MIME-Version: 1.0 References: <20190207185917.167829-1-egranata@google.com> In-Reply-To: From: Dmitry Torokhov Date: Thu, 7 Feb 2019 12:29:17 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] driver: platform: Add support for GpioInt() ACPI to platform_get_irq() To: Andy Shevchenko Cc: Enrico Granata , "Rafael J. Wysocki" , Greg Kroah-Hartman , Enric Balletbo i Serra , Linux Kernel Mailing List , Gwendal Grignou , ACPI Devel Maling List , Brian Norris , Enrico Granata , Mika Westerberg , Andy Shevchenko , Hans de Goede Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 7, 2019 at 12:18 PM Andy Shevchenko wrote: > > On Thu, Feb 7, 2019 at 9:45 PM Enrico Granata wrote= : > > On Thu, Feb 7, 2019 at 11:39 AM Andy Shevchenko wrote: > >> On Thu, Feb 7, 2019 at 9:04 PM Rafael J. Wysocki w= rote: > > >> > > This is not currently done for the platform drivers, as platform_g= et_irq() > >> > > does not try to parse GpioInt() resources. > >> > >> And why is this a problem? > > > In ChromeOS, we have a driver (cros_ec_lpc) which can run either on sys= tems that directly expose the interrupt, > > or systems where the interrupt goes through a GPIO controller. On the f= ormer, firmware provides an Interrupt resource > > and platform_get_irq() finds it. On the latter, firmware provides a Gpi= oInt resource and platform_get_irq does not > > find it. We could work around this in the driver by probing both paths,= but since other subsystems seem to directly > > look for GpioInt resources, it seemed to us to make more sense to exten= d platform_get_irq() instead. > > Looking briefly into the driver I found third scenario =E2=80=94 no resou= rce at all. > So, you already have a quirk for that. Now it's the question either > you go for global quirk (trying to find an IRQ via iterating over > GpioInt() resources like in this patch, but in the driver), or use DMI > table for more stricter rules. No, no DMI rules please, they are more pain than anything. > > Either way you choose, I don't see a necessity to put this to the > driver core for now since it would be the only (let's assume properly > written ACPI tables) driver needs such. This is simply kicking the can down the road. > > > Do you have a suggestion as to how to write ACPI tables to avoid the is= sue? > > 1. Allocate new ID and use it (perhaps not the best path). > 2. Use GPE(s). > Or just solve the issue of intermixing Interrupt() with GpioInt(). We have similar issue with i2c and spi, but we sidestep that there as we only parse the first interrupt and do not give option of fetching 2nd, 3rd, etc. Maybe we should only GpioInt parsing for the first interrupt in platform_get_irq() as well for the first iteration and then see if we need to improve it if we see devices with multiple interrupts. Thanks, Dmitry