From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA3BEC43214 for ; Thu, 29 Jul 2021 17:31:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C619860F46 for ; Thu, 29 Jul 2021 17:31:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232321AbhG2Rbb (ORCPT ); Thu, 29 Jul 2021 13:31:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229863AbhG2Rba (ORCPT ); Thu, 29 Jul 2021 13:31:30 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99B0BC061765; Thu, 29 Jul 2021 10:31:25 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id j2so7856246wrx.9; Thu, 29 Jul 2021 10:31:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=pnVzhT/kHdPgZUP65cfJqBoONaapfo5r8e0MrAlb984=; b=jaC3QwjjviykfCntbsWoFJDNF21xu8yghmN2KvvaAwVUR4mtfATAQuHMPuqadbtwUo enKV2slTVRgfCP9UgZzJYDTlQzdrKjzXg40LcjUTktctC59CEkWGBuKgJOqn3kcVELDN Gqxm5cr4MEyeN4XO3INSQNXopzzpjPCRuzeAqoaougPd45yqEiG0QSflJ4YmoIPr+AG2 C19SzpImiBO3ayVtb+QZgtJZkr/k/yLA40n2jxJGvVR/esMJm87HNs/Zm41DwU8GfwaN egcbUqeuxrXgU6aRr8UnTTrN6e03v1GHu4m4OBgMNOkR0Q8S9CR9s+XfGM23/WP7MRAM 7eBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=pnVzhT/kHdPgZUP65cfJqBoONaapfo5r8e0MrAlb984=; b=LtaCzrn8Uas1y2LurY07RxsIL9eXbafMdZexY8GSER3/kBRXZyjsCOTMqHMvl+7x2s HoCyXwM0N/7JFGv0Tr0ABHtM3DZrk/tanwNW4RKkxmwEMumq/I415bQDjdePnnl04YIy yEtO0oNP2/hkovrT6mfXQ2ZdycR+eqye9nT5OFR1iirTO7GSNRhrDlMNuCbmfiRaYoNj ioZ8pjcsH+3rz8e8pMiVGBpLTLoFxMz3FAng8ZVP+uLCAx/gd40x9iRPJa4TAUFjpFe3 flNhhTxAVUAUReTuixV64UtyBNFyCjf/aW23FeCydB4vPIYPWvKIyNslW+E4+9m6EdLO z8cQ== X-Gm-Message-State: AOAM531D9FkAhVaEpRNKgk8RTO037oulgBKaZYM+lHmX7hV2GVF6AGkc vBpcDA9aade/OIZn3SPnhHxJqum3nKz35mUlo+I= X-Google-Smtp-Source: ABdhPJzB3zZoxPwWPnZQvco4cbgtwKh7tKLWjYB2qIguBecvjgdSw2VQJQ94SIm5agk39ycqx5XjveJvKou3TG92Cro= X-Received: by 2002:a5d:4348:: with SMTP id u8mr6400529wrr.28.1627579884127; Thu, 29 Jul 2021 10:31:24 -0700 (PDT) MIME-Version: 1.0 References: <1627473242-35926-1-git-send-email-akhilpo@codeaurora.org> In-Reply-To: From: Rob Clark Date: Thu, 29 Jul 2021 10:35:32 -0700 Message-ID: Subject: Re: [PATCH v3 1/2] arm64: dts: qcom: sc7280: Add gpu support To: Stephen Boyd Cc: Akhil P Oommen , Bjorn Andersson , Manaf Meethalavalappu Pallikunhi , OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS , Rob Herring , dri-devel , freedreno , linux-arm-msm , Jordan Crouse , Douglas Anderson , Matthias Kaehlcke , Jonathan Marek , Andy Gross , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 29, 2021 at 10:19 AM Stephen Boyd wrote: > > Quoting Akhil P Oommen (2021-07-28 04:54:01) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > index 029723a..c88f366 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > > @@ -592,6 +593,85 @@ > > qcom,bcm-voters = <&apps_bcm_voter>; > > }; > > > > + gpu@3d00000 { > > + compatible = "qcom,adreno-635.0", "qcom,adreno"; > > + #stream-id-cells = <16>; > > + reg = <0 0x03d00000 0 0x40000>, > > + <0 0x03d9e000 0 0x1000>, > > + <0 0x03d61000 0 0x800>; > > + reg-names = "kgsl_3d0_reg_memory", > > + "cx_mem", > > + "cx_dbgc"; > > + interrupts = ; > > + iommus = <&adreno_smmu 0 0x401>; > > + operating-points-v2 = <&gpu_opp_table>; > > + qcom,gmu = <&gmu>; > > + interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>; > > + interconnect-names = "gfx-mem"; > > + > > + gpu_opp_table: opp-table { > > + compatible = "operating-points-v2"; > > + > > + opp-550000000 { > > + opp-hz = /bits/ 64 <550000000>; > > + opp-level = ; > > + opp-peak-kBps = <6832000>; > > + }; > > + > > + opp-450000000 { > > Why is 450000000 after 550000000? Is it on purpose? If not intended > please sort by frequency. We've used descending order, at least for gpu opp table, on other gens, fwiw.. not sure if that just means we were doing it wrong previously BR, -R > > > + opp-hz = /bits/ 64 <450000000>; > > + opp-level = ; > > + opp-peak-kBps = <4068000>; > > + }; > > + > > + opp-315000000 { > > + opp-hz = /bits/ 64 <315000000>; > > + opp-level = ; > > + opp-peak-kBps = <1804000>; > > + }; > > + }; > > + }; > > +