linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Sumit Garg <sumit.garg@linaro.org>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Russell King <linux@arm.linux.org.uk>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Valentin Schneider <Valentin.Schneider@arm.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Andrew Lunn <andrew@lunn.ch>,
	kernel-team@android.com
Subject: Re: [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts
Date: Tue, 11 Aug 2020 18:45:21 +0530	[thread overview]
Message-ID: <CAFA6WYNw7TgypuEdOVRQ4QzAe6BbOg8V0_6O-Xb1=8xybse=nQ@mail.gmail.com> (raw)
In-Reply-To: <20200624195811.435857-1-maz@kernel.org>

Hi Marc,

On Thu, 25 Jun 2020 at 01:28, Marc Zyngier <maz@kernel.org> wrote:
>
> For as long as SMP ARM has existed, IPIs have been handled as
> something special. The arch code and the interrupt controller exchange
> a couple of hooks (one to generate an IPI, another to handle it).
>
> Although this is perfectly manageable, it prevents the use of features
> that we could use if IPIs were Linux IRQs (such as pseudo-NMIs). It
> also means that each interrupt controller driver has to follow an
> architecture-specific interface instead of just implementing the base
> irqchip functionalities. The arch code also duplicates a number of
> things that the core irq code already does (such as calling
> set_irq_regs(), irq_enter()...).
>
> This series tries to remedy this on arm/arm64 by offering a new
> registration interface where the irqchip gives the arch code a range
> of interrupts to use for IPIs. The arch code requests these as normal
> per-cpu interrupts.
>
> The bulk of the work is at the interrupt controller level, where all 5
> irqchips used on arm+SMP/arm64 get converted.
>
> Finally, we drop the legacy registration interface as well as the
> custom statistics accounting.
>
> Note that I have had a look at providing a "generic" interface by
> expanding the kernel/irq/ipi.c bag of helpers, but so far all
> irqchips have very different requirements, so there is hardly anything
> to consolidate for now. Maybe some as hip04 and the Marvell horror get
> cleaned up (the latter certainly could do with a good dusting).
>
> This has been tested on a bunch of 32 and 64bit guests (GICv2, GICv3),
> as well as 64bit bare metal (GICv3). The RPi part has only been tested
> in QEMU as a 64bit guest, while the HiSi and Marvell parts have only
> been compile-tested.

This series works perfectly fine on Developerbox.

I just want to follow-up regarding when you are planning to push this
series upstream? Are you waiting for other irqchips (apart from GIC)
to be reviewed?

Actually mine work to turn IPI as a pseudo NMI [1] is dependent on
this patch-set.

[1] https://lkml.org/lkml/2020/5/20/488

-Sumit

>
> * From v1:
>   - Clarified the effect of nesting irq_enter/exit (Russell)
>   - Changed the point where we tear IPIs down on (Valentin)
>   - IPIs are no longer accessible from DT
>   - HIP04 and Armada 370-XP have been converted, but are untested
>   - arch-specific kstat accounting is removed
>   - ARM's legacy interface is dropped
>
> Marc Zyngier (17):
>   genirq: Add fasteoi IPI flow
>   genirq: Allow interrupts to be excluded from /proc/interrupts
>   arm64: Allow IPIs to be handled as normal interrupts
>   ARM: Allow IPIs to be handled as normal interrupts
>   irqchip/gic-v3: Describe the SGI range
>   irqchip/gic-v3: Configure SGIs as standard interrupts
>   irqchip/gic: Atomically update affinity
>   irqchip/gic: Refactor SMP configuration
>   irqchip/gic: Configure SGIs as standard interrupts
>   irqchip/gic-common: Don't enable SGIs by default
>   irqchip/bcm2836: Configure mailbox interrupts as standard interrupts
>   irqchip/hip04: Configure IPIs as standard interrupts
>   irqchip/armada-370-xp: Configure IPIs as standard interrupts
>   arm64: Kill __smp_cross_call and co
>   arm64: Remove custom IRQ stat accounting
>   ARM: Kill __smp_cross_call and co
>   ARM: Remove custom IRQ stat accounting
>
>  arch/arm/Kconfig                    |   1 +
>  arch/arm/include/asm/hardirq.h      |  17 --
>  arch/arm/include/asm/smp.h          |   5 +-
>  arch/arm/kernel/smp.c               | 135 +++++++++-----
>  arch/arm64/Kconfig                  |   1 +
>  arch/arm64/include/asm/hardirq.h    |   9 -
>  arch/arm64/include/asm/irq_work.h   |   4 +-
>  arch/arm64/include/asm/smp.h        |   6 +-
>  arch/arm64/kernel/smp.c             | 119 ++++++++-----
>  drivers/irqchip/irq-armada-370-xp.c | 262 +++++++++++++++++++---------
>  drivers/irqchip/irq-bcm2836.c       | 151 +++++++++++++---
>  drivers/irqchip/irq-gic-common.c    |   3 -
>  drivers/irqchip/irq-gic-v3.c        |  99 ++++++-----
>  drivers/irqchip/irq-gic.c           | 183 ++++++++++---------
>  drivers/irqchip/irq-hip04.c         |  89 +++++-----
>  include/linux/irq.h                 |   5 +-
>  kernel/irq/chip.c                   |  27 +++
>  kernel/irq/debugfs.c                |   1 +
>  kernel/irq/proc.c                   |   2 +-
>  kernel/irq/settings.h               |   7 +
>  20 files changed, 713 insertions(+), 413 deletions(-)
>
> --
> 2.27.0
>

  parent reply	other threads:[~2020-08-11 13:15 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-24 19:57 [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 01/17] genirq: Add fasteoi IPI flow Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 02/17] genirq: Allow interrupts to be excluded from /proc/interrupts Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 03/17] arm64: Allow IPIs to be handled as normal interrupts Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-07-10 19:58   ` Valentin Schneider
2020-06-24 19:57 ` [PATCH v2 04/17] ARM: " Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-29  9:37     ` Marc Zyngier
2020-06-24 19:57 ` [PATCH v2 05/17] irqchip/gic-v3: Describe the SGI range Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 06/17] irqchip/gic-v3: Configure SGIs as standard interrupts Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-06-30 10:15     ` Marc Zyngier
2020-07-02 13:23       ` Valentin Schneider
2020-07-02 13:48         ` Marc Zyngier
2020-07-02 14:24           ` Valentin Schneider
2020-06-24 19:58 ` [PATCH v2 07/17] irqchip/gic: Atomically update affinity Marc Zyngier
2020-07-01 19:33   ` Sasha Levin
2020-07-10 14:02   ` Sasha Levin
2021-09-09 15:22   ` Geert Uytterhoeven
2021-09-09 15:37     ` Russell King (Oracle)
2021-09-10 10:22     ` Marc Zyngier
2021-09-10 13:19       ` Geert Uytterhoeven
2021-09-11  2:49         ` Magnus Damm
2021-09-11 19:32           ` Marc Zyngier
2021-09-12  5:40             ` Magnus Damm
2021-09-13  8:05               ` Geert Uytterhoeven
2021-09-15  3:28                 ` Magnus Damm
2021-09-22 13:53     ` [irqchip: irq/irqchip-fixes] irqchip/gic: Work around broken Renesas integration irqchip-bot for Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 08/17] irqchip/gic: Refactor SMP configuration Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 09/17] irqchip/gic: Configure SGIs as standard interrupts Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 10/17] irqchip/gic-common: Don't enable SGIs by default Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 11/17] irqchip/bcm2836: Configure mailbox interrupts as standard interrupts Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 12/17] irqchip/hip04: Configure IPIs " Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 13/17] irqchip/armada-370-xp: " Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 14/17] arm64: Kill __smp_cross_call and co Marc Zyngier
2020-06-25 18:25   ` Valentin Schneider
2020-07-02 13:37     ` Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 15/17] arm64: Remove custom IRQ stat accounting Marc Zyngier
2020-06-25 18:26   ` Valentin Schneider
2020-06-26 11:58     ` Marc Zyngier
2020-06-26 23:15       ` Valentin Schneider
2020-06-27 11:42         ` Marc Zyngier
2020-07-10 19:58   ` Valentin Schneider
2020-06-24 19:58 ` [PATCH v2 16/17] ARM: Kill __smp_cross_call and co Marc Zyngier
2020-06-24 19:58 ` [PATCH v2 17/17] ARM: Remove custom IRQ stat accounting Marc Zyngier
2020-06-25 18:24 ` [PATCH v2 00/17] arm/arm64: Turning IPIs into normal interrupts Valentin Schneider
2020-07-10 19:58   ` Valentin Schneider
2020-08-11 13:15 ` Sumit Garg [this message]
2020-08-11 13:58   ` Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAFA6WYNw7TgypuEdOVRQ4QzAe6BbOg8V0_6O-Xb1=8xybse=nQ@mail.gmail.com' \
    --to=sumit.garg@linaro.org \
    --cc=Valentin.Schneider@arm.com \
    --cc=andrew@lunn.ch \
    --cc=catalin.marinas@arm.com \
    --cc=f.fainelli@gmail.com \
    --cc=gregory.clement@bootlin.com \
    --cc=jason@lakedaemon.net \
    --cc=kernel-team@android.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux@arm.linux.org.uk \
    --cc=maz@kernel.org \
    --cc=tglx@linutronix.de \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).