Re: [PATCH 1/3] clk: meson: mpll: properly handle spread spectrum

[Martin Blumenstingl <martin.blumenstingl@googlemail.com>]

Hi Jerome,

On Sat, Mar 30, 2019 at 12:07 AM Jerome Brunet <jbrunet@baylibre.com> wrote:
>
> On Fri, 2019-03-29 at 20:39 +0100, Martin Blumenstingl wrote:
> > Hi Jerome,
> >
> > On Fri, Mar 29, 2019 at 4:34 PM Jerome Brunet <jbrunet@baylibre.com> wrote:
> > > The bit 'SSEN' available on some MPLL DSS outputs is not related to the
> > > fractional part of the divider but to the function called
> > > 'Spread Spectrum'.
> > >
> > > This function might be used to solve EM issues by adding a jitter on
> > > clock signal. This widens the signal spectrum and weakens the peaks in it.
> > >
> > > While spread spectrum might be useful for some application, it is
> > > problematic for others, such as audio.
> > >
> > > This patch introduce a new flag to the MPLL driver to enable (or not) the
> > > spread spectrum function.
> > >
> > > Fixes: 1f737ffa13ef ("clk: meson: mpll: fix mpll0 fractional part ignored")
> > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> > > ---
> > >  drivers/clk/meson/clk-mpll.c | 9 ++++++---
> > >  drivers/clk/meson/clk-mpll.h | 1 +
> > >  2 files changed, 7 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c
> > > index 64d31c8ba3d0..2d39a8bc367c 100644
> > > --- a/drivers/clk/meson/clk-mpll.c
> > > +++ b/drivers/clk/meson/clk-mpll.c
> > > @@ -141,9 +141,12 @@ static void mpll_init(struct clk_hw *hw)
> > >         /* Enable the fractional part */
> > >         meson_parm_write(clk->map, &mpll->sdm_en, 1);
> > >
> > > -       /* Set additional fractional part enable if required */
> > > -       if (MESON_PARM_APPLICABLE(&mpll->ssen))
> > > -               meson_parm_write(clk->map, &mpll->ssen, 1);
> > > +       /* Set spread spectrum if possible */
> > > +       if (MESON_PARM_APPLICABLE(&mpll->ssen)) {
> > > +               unsigned int ss =
> > > +                       mpll->flags & CLK_MESON_MPLL_SPREAD_SPECTRUM ? 1 : 0;
> > > +               meson_parm_write(clk->map, &mpll->ssen, ss);
> > > +       }
> > this changes the "ssen" flag on all supported clocks from 1 (before
> > this patch) to 0 (after this patch).
> > is this on purpose and how does it affect existing clocks?
>
> Yes, none of our application require spread spectrum
thank you for the explanation. can you please add it to the patch description?

> The fact is that only 2 MPLL had this bit, mpll0 on gx (without effect) and
> mpll0 on axg: actually spread spectrum impacts mpll2, making it unusable, as
> explained in the related patch
>
> >
> > based on the original commit 1f737ffa13ef ("clk: meson: mpll: fix
> > mpll0 fractional part ignored") it seems that
> > CLK_MESON_MPLL_SPREAD_SPECTRUM should be set for mpll0 (at least on
> > GXBB and Meson8b)
> >
>
> There a patch specifically targeting gxbb.
I missed that, sorry for the noise

> I have checked on GXL and this bit had no effect (fractional part still on, no
> spread spectrum)
>
> So either we fixed something since then or I messed up when doing the patch
> initially.
>
> Feel free to cross check
I tried it on Meson8b and it seems that there's no difference. I've
done a bit of software archaeology:
$ grep -R mpll_cntl uboot-2015-01-15-23a3562521/ | grep "=" | head -n3
uboot-2015-01-15-23a3562521/board/amlogic/m8_k100_1G/firmware/timming.c:
       .mpll_cntl = 0x600009A9,        //2.5G, fixed
uboot-2015-01-15-23a3562521/board/amlogic/m8_k100_2G/firmware/timming.c:
       .mpll_cntl = 0x600009A9,        //2.5G, fixed
uboot-2015-01-15-23a3562521/board/amlogic/m8b_ft_v1/firmware/timming.c:
.mpll_cntl = 0x600009A9,        //2.5G, fixed

Ethernet is still working on my Odroid-C1, so you can add my:
Tested-by: Martin Blumenstingl<martin.blumenstingl@googlemail.com>


Regards
Martin