From: Ley Foon Tan <firstname.lastname@example.org> To: Dietmar Eggemann <email@example.com> Cc: Peter Zijlstra <firstname.lastname@example.org>, Vincent Guittot <email@example.com>, Ingo Molnar <firstname.lastname@example.org>, Greg KH <email@example.com>, firstname.lastname@example.org, Quentin Perret <email@example.com> Subject: Re: sched: Question about big and little cores system with SMP and EAS Date: Thu, 17 Jun 2021 13:00:12 +0800 [thread overview] Message-ID: <CAFiDJ5-j8UER1mGggC62C309T+t+y6-vy_NuKOJL6TQHrHAGtA@mail.gmail.com> (raw) In-Reply-To: <firstname.lastname@example.org> On Wed, Jun 16, 2021 at 9:20 PM Dietmar Eggemann <email@example.com> wrote: > > - Quentin Perret <firstname.lastname@example.org> > + Quentin Perret <email@example.com> > > On 16/06/2021 13:39, Peter Zijlstra wrote: > > On Wed, Jun 16, 2021 at 07:29:26PM +0800, Ley Foon Tan wrote: > >> Hi all > >> > >> Would like to ask the experts here regarding the Symmetric > >> Multi-Processing mode (SMP) with Energy aware scheduler (EAS) support > >> on the big + little cores system. > > > > And the you ask a question unrelated to either Symmetric MP or EAS :-) > > > >> Hardware system: > >> Big and little cores have almost the same ISA, but the big core has > >> some extension instructions that little core doesn't have. > > > > That problem is unrelated to big.Little / EAS, also by definition that > > is not SMP seeing how the 'S' is a blatant lie. > > > > The simplest solution is to simply disallow usage of the extended ISA > > and force mandate the common subset. The complicated answer is something > > along the lines of: > > > > https://firstname.lastname@example.org > > We don't encourage asymmetric ISA extensions for EAS*/CAS** on > big.Little systems. > It would be simply a nightmare to schedule tasks on such systems. > > The exception to this is the 'asymmetric 32-bit Soc' to support 32bit > legacy Apps. The nightmare for scheduling is reduced in this case to CPU > affinity, something the task scheduler has to live with already today. > (+ DL admission control for 32bit tasks). > > * Documentation/scheduler/sched-energy.rst > ** Documentation/scheduler/sched-capacity.rst Thanks for the reply. Yes, forsee it is very complicated and nightmare for software to support for SMP mode but HW is not real "symmetric". That's why post the question here to ask the advice and comment from experts here. So that can feedback to HW team. Asymmetric extension instructions issue should more complicated than asymmetric 32-bit app support, it can happen in all the areas (kernel, app, library and etc). Thanks! Regards Ley Foon
next prev parent reply other threads:[~2021-06-17 5:00 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-16 11:29 Ley Foon Tan 2021-06-16 11:39 ` Peter Zijlstra 2021-06-16 13:20 ` Dietmar Eggemann 2021-06-17 5:00 ` Ley Foon Tan [this message] 2021-06-17 7:51 ` Morten Rasmussen
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