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From: Ganapatrao Kulkarni <gpkulkarni@gmail.com>
Date: Tue, 2 May 2017 13:57:01 +0530
Message-ID: <CAFpQJXX8G0Ksqw2+4dETJD4A2y32eFMwXBXcz1UDQW_jVBX2QQ@mail.gmail.com>
Subject: Re: [PATCH v2 4/4] perf vendor events arm64: Add implementation
 defined pmu core events of ThunderX2
To: Will Deacon <will.deacon@arm.com>
Cc: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Mark Rutland <mark.rutland@arm.com>, acme@kernel.org,
        alexander.shishkin@linux.intel.com, peterz@infradead.org,
        Ingo Molnar <mingo@redhat.com>,
        Jayachandran C <jnair@caviumnetworks.com>
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On Fri, Apr 28, 2017 at 10:50 PM, Will Deacon <will.deacon@arm.com> wrote:
> On Fri, Apr 28, 2017 at 10:23:47AM +0530, Ganapatrao Kulkarni wrote:
>> This is not a full event list, but a short list of useful events.
>>
>> Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com>
>> ---
>>  tools/perf/pmu-events/arch/arm64/mapfile.csv       | 14 +++++
>>  .../arm64/thunderx2/implementation-defined.json    | 62 ++++++++++++++++++++++
>>  2 files changed, 76 insertions(+)
>>  create mode 100644 tools/perf/pmu-events/arch/arm64/mapfile.csv
>>  create mode 100644 tools/perf/pmu-events/arch/arm64/thunderx2/implementation-defined.json
>>
>> diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>> new file mode 100644
>> index 0000000..bc9f798
>> --- /dev/null
>> +++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
>> @@ -0,0 +1,14 @@
>> +# Format:
>> +#    MIDR,Version,JSON/file/pathname,Type
>> +#
>> +# where
>> +#    MIDR    Processor version
>> +#    Version could be used to track version of of JSON file
>> +#            but currently unused.
>> +#    JSON/file/pathname is the path to JSON file, relative
>> +#            to tools/perf/pmu-events/arch/arm64/.
>> +#    Type is core, uncore etc
>> +#
>> +#
>> +#Family-model,Version,Filename,EventType
>> +0x00000000420f5161,v1,thunderx2,core
>
> In general, I don't think we want to require an exact match on the whole
> MIDR here. Specifically, we'd want to mask out the Variant and Revision
> fields for ARM CPUs, to avoid having to update the mapfile all the time.
>
> Is it possible to support wildcarding in the MIDR match?

thanks, Variant and Revision can be wildcard.
>
> Will

thanks
Ganapat