From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E8B2C4338F for ; Thu, 5 Aug 2021 19:05:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EBB6560F42 for ; Thu, 5 Aug 2021 19:05:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241469AbhHETF4 (ORCPT ); Thu, 5 Aug 2021 15:05:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50112 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232116AbhHETFz (ORCPT ); Thu, 5 Aug 2021 15:05:55 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BDD09C061765 for ; Thu, 5 Aug 2021 12:05:40 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id e2-20020a17090a4a02b029016f3020d867so11880128pjh.3 for ; Thu, 05 Aug 2021 12:05:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=2ZFFq7OM5nVkToszzdtX9QSlNl/eY89U4a4AO5gbJ0c=; b=dgxIBWU0u0EHXfPQrJsNfrQ8leeNYIxMblGPZfdM3Ua7Qj+jQjx5zoz/UaSUmzqj6q tIX67J0aXI+Av+ptQljjWXFQeGYLxwdbj2qhFwEWL90k+N25uxQ1rDEDrKiPb4wqRVe3 rT23r+cBkDJ9g8JijWw84nFgPxCSpV4PQn+iMphpfz4y04ObSCyLuI60Z07KnNlfZ+oj NY/2x7Jo2MqimtJzymKazggA5aIuIkvFjUWcsmy7w2hBG3tGQFpqsSt6Hkknt5XLIM/T +rW8B1o1WfkgB4tUvMQfipkFb2KUbdd/DxggqQFa/z8Ii/CpEAG2KWbvZi0Sw8VZXi/R Bq0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=2ZFFq7OM5nVkToszzdtX9QSlNl/eY89U4a4AO5gbJ0c=; b=V4a+KaePAc0jtahUtNHF0Iur+4b1xebk3Xd8eU+kV+WrTcyGtlMQZndD7OpVMUqkxf ujCcgBKV07KoEY+o5/mhRjd73KQ9dWEP+hmcQKfXkHhFAZ1XNN0fGyoZnxHkbsu88+sn 8lvQm8htMqVBM0hG7aWzCt033g/y/7vr1Czmhv/KZdJ/bK4XwBdgY+WsQfyhqaUxxjyY dRKw/JeQYZQbVll4ErYUno2Ehsq+rsYtZVpf3wFgpjaG9klHpTfc9KR6SCyflWlpIlk2 B5vQoF4UbrZ5PCH2uVZAbJOq/IF750iBYkCIeSUOWVnEMaA6C/Rt/PEpG8GNMQXdX0JH 6pGw== X-Gm-Message-State: AOAM532AX5lBIoKg1mzanmxS8QjetBMpg4CevzIhYS0AdDyslJhMF1hz dA7V6WVuZmnxa7sxwt4MJjsJWZyYrrCrxJ3d9VHm8g== X-Google-Smtp-Source: ABdhPJxKXPQWKZYVNFugMmvukgwEvPM1+RUaAfvu87Y0aIiNAm/MX3SlelYUjvZdxUxr63cktsycKHW5sNSqYYm9sU0= X-Received: by 2002:aa7:90c8:0:b029:32c:935f:de5f with SMTP id k8-20020aa790c80000b029032c935fde5fmr6578542pfk.79.1628190340250; Thu, 05 Aug 2021 12:05:40 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Robert Foss Date: Thu, 5 Aug 2021 21:05:29 +0200 Message-ID: Subject: Re: [PATCH v1 1/1] drm/bridge: anx7625: Tune K value for IVO panel To: Xin Ji Cc: Nicolas Boichat , Andrzej Hajda , Neil Armstrong , Laurent Pinchart , Jonas Karlman , Dan Carpenter , David Airlie , Daniel Vetter , Boris Brezillon , Sam Ravnborg , Hsin-Yi Wang , Torsten Duwe , Vasily Khoruzhick , Marek Szyprowski , Bernie Liang , dri-devel , linux-kernel , devel@driverdev.osuosl.org, Qilin Wen Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hey Xin, Thanks for submitting this. On Thu, 5 Aug 2021 at 09:31, Xin Ji wrote: > > IVO panel require less input video clock variation than video clock > variation in DP CTS spec. > > This patch decreases the K value of ANX7625 which will shrink eDP Tx > video clock variation to meet IVO panel's requirement. > > Signed-off-by: Xin Ji > --- > drivers/gpu/drm/bridge/analogix/anx7625.c | 17 ++++++++++++++--- > drivers/gpu/drm/bridge/analogix/anx7625.h | 4 +++- > 2 files changed, 17 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c > index a3d82377066b..ceed1c7f3f28 100644 > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > @@ -384,6 +384,18 @@ static int anx7625_odfc_config(struct anx7625_data *ctx, > return ret; > } > > +static int anx7625_set_k_value(struct anx7625_data *ctx) Pardon my ignorance, but I don't know what a K-value is. Could you add a comment detailing what the K-value does? > +{ > + struct edid *edid = (struct edid *)ctx->slimport_edid_p.edid_raw_data; > + > + if (edid->mfg_id[0] == IVO_MID0 && edid->mfg_id[1] == IVO_MID1) > + return anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_ADJ_1, 0x3B); > + > + return anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > + MIPI_DIGITAL_ADJ_1, 0x3D); > +} > + > static int anx7625_dsi_video_timing_config(struct anx7625_data *ctx) > { > struct device *dev = &ctx->client->dev; > @@ -470,9 +482,8 @@ static int anx7625_dsi_video_timing_config(struct anx7625_data *ctx) > MIPI_PLL_N_NUM_15_8, (n >> 8) & 0xff); > ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, MIPI_PLL_N_NUM_7_0, > (n & 0xff)); > - /* Diff */ > - ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > - MIPI_DIGITAL_ADJ_1, 0x3D); > + /* Diff and K value */ With a proper comment above, this comment is no longer needed. > + anx7625_set_k_value(ctx); > > ret |= anx7625_odfc_config(ctx, post_divider - 1); > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h > index 034c3840028f..6dcf64c703f9 100644 > --- a/drivers/gpu/drm/bridge/analogix/anx7625.h > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h > @@ -210,7 +210,9 @@ > #define MIPI_VIDEO_STABLE_CNT 0x0A > > #define MIPI_LANE_CTRL_10 0x0F > -#define MIPI_DIGITAL_ADJ_1 0x1B > +#define MIPI_DIGITAL_ADJ_1 0x1B > +#define IVO_MID0 0x26 > +#define IVO_MID1 0xCF > > #define MIPI_PLL_M_NUM_23_16 0x1E > #define MIPI_PLL_M_NUM_15_8 0x1F > -- > 2.25.1 > LGTM with the above fix. Reviewed-by: Robert Foss