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From: Kees Cook <keescook@chromium.org>
To: Michael Ellerman <mpe@ellerman.id.au>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Thomas Gleixner <tglx@linutronix.de>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	linux-doc@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
	linuxppc-dev@ozlabs.org
Subject: Re: [PATCH] Documentation: Add powerpc options for spec_store_bypass_disable
Date: Mon, 9 Jul 2018 20:19:50 -0700	[thread overview]
Message-ID: <CAGXu5j+JvY34VRH17=2xgT0ah9Tmj=jchZsxjSV03B_0cN19eA@mail.gmail.com> (raw)
In-Reply-To: <20180710020836.23571-1-mpe@ellerman.id.au>

On Mon, Jul 9, 2018 at 7:08 PM, Michael Ellerman <mpe@ellerman.id.au> wrote:
> Document the support for spec_store_bypass_disable that was added for
> powerpc in commit a048a07d7f45 ("powerpc/64s: Add support for a store
> forwarding barrier at kernel entry/exit").
>
> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

Reviewed-by: Kees Cook <keescook@chromium.org>

-Kees

> ---
>  Documentation/admin-guide/kernel-parameters.txt | 16 +++++++++++++---
>  1 file changed, 13 insertions(+), 3 deletions(-)
>
> I tried documenting the differences between the PPC options and X86 ones in one
> section, but it got quite messy, so I went with this instead. Happy to take
> advice on how better to structure it if anyone has opinions.
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index efc7aa7a0670..f320c7168b04 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -4060,6 +4060,8 @@
>                         This parameter controls whether the Speculative Store
>                         Bypass optimization is used.
>
> +                       On x86 the options are:
> +
>                         on      - Unconditionally disable Speculative Store Bypass
>                         off     - Unconditionally enable Speculative Store Bypass
>                         auto    - Kernel detects whether the CPU model contains an
> @@ -4075,12 +4077,20 @@
>                         seccomp - Same as "prctl" above, but all seccomp threads
>                                   will disable SSB unless they explicitly opt out.
>
> -                       Not specifying this option is equivalent to
> -                       spec_store_bypass_disable=auto.
> -
>                         Default mitigations:
>                         X86:    If CONFIG_SECCOMP=y "seccomp", otherwise "prctl"
>
> +                       On powerpc the options are:
> +
> +                       on,auto - On Power8 and Power9 insert a store-forwarding
> +                                 barrier on kernel entry and exit. On Power7
> +                                 perform a software flush on kernel entry and
> +                                 exit.
> +                       off     - No action.
> +
> +                       Not specifying this option is equivalent to
> +                       spec_store_bypass_disable=auto.
> +
>         spia_io_base=   [HW,MTD]
>         spia_fio_base=
>         spia_pedr=
> --
> 2.14.1
>



-- 
Kees Cook
Pixel Security

  reply	other threads:[~2018-07-10  3:20 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-10  2:08 [PATCH] Documentation: Add powerpc options for spec_store_bypass_disable Michael Ellerman
2018-07-10  3:19 ` Kees Cook [this message]
2018-07-10  6:10 ` Thomas Gleixner
2018-07-10 21:13 ` Jonathan Corbet

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