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[209.85.221.41]) by smtp.gmail.com with ESMTPSA id a4sm909152eje.66.2019.02.04.02.16.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Feb 2019 02:16:37 -0800 (PST) Received: by mail-wr1-f41.google.com with SMTP id s12so13734919wrt.4; Mon, 04 Feb 2019 02:16:37 -0800 (PST) X-Received: by 2002:adf:eb12:: with SMTP id s18mr7407806wrn.120.1549275396962; Mon, 04 Feb 2019 02:16:36 -0800 (PST) MIME-Version: 1.0 References: <20190203155628.16767-1-wens@csie.org> <20190203155628.16767-3-wens@csie.org> <20190204093427.vg63e5xmd7u52leh@flea> In-Reply-To: <20190204093427.vg63e5xmd7u52leh@flea> From: Chen-Yu Tsai Date: Mon, 4 Feb 2019 18:16:24 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/3] mmc: sunxi: Filter out unsupported modes declared in the device tree To: Maxime Ripard Cc: Ulf Hansson , linux-mmc@vger.kernel.org, linux-arm-kernel , devicetree , linux-kernel , linux-sunxi , Chris Blake , stable Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 4, 2019 at 5:34 PM Maxime Ripard wrote: > > On Sun, Feb 03, 2019 at 11:56:27PM +0800, Chen-Yu Tsai wrote: > > The MMC device tree bindings include properties used to signal various > > signalling speed modes. Until now the sunxi driver was accepting them > > without any further filtering, while the sunxi device trees were not > > actually using them. > > > > Since some of the H5 boards can not run at higher speed modes stably, > > we are resorting to declaring the higher speed modes per-board. > > > > Regardless, having boards declare modes and blindly following them, > > even without proper support in the driver, is generally a bad thing. > > > > Filter out all unsupported modes from the capabilities mask after > > the device tree properties have been parsed. > > > > Cc: > > Signed-off-by: Chen-Yu Tsai > > > > --- > > > > This should be backported to stable kernels in case people try to run > > new device trees (that declare newly supported modes) with old kernels. > > --- > > drivers/mmc/host/sunxi-mmc.c | 16 ++++++++++++++++ > > 1 file changed, 16 insertions(+) > > > > diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c > > index 7415af8c8ff6..a01433012db0 100644 > > --- a/drivers/mmc/host/sunxi-mmc.c > > +++ b/drivers/mmc/host/sunxi-mmc.c > > @@ -1415,6 +1415,22 @@ static int sunxi_mmc_probe(struct platform_device *pdev) > > if (ret) > > goto error_free_dma; > > > > + /* > > + * If we don't support delay chains in the SoC, we can't use any > > + * of the DDR speed modes. Mask them out in case the device > > + * tree specifies the properties for them, which gets added to > > + * the caps by mmc_of_parse() above. > > + */ > > + if (!(host->cfg->clk_delays || host->use_new_timings)) > > + mmc->caps &= ~(MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR | > > + MMC_CAP_1_2V_DDR); > > + > > + /* TODO: UHS modes untested due to lack of supporting boards */ > > + mmc->caps &= ~MMC_CAP_UHS; > > I've tested up to SDR104 and it works on the A64 at least That's good to know. What board was this on? I had given up hope waiting for a vendor to produce a board that could do proper voltage switching for SD cards. > > + /* TODO: This driver doesn't support HS200 and HS400 modes yet */ > > + mmc->caps2 &= ~(MMC_CAP2_HS200 | MMC_CAP2_HS400); > > And HS200 works too. OK. I thought there was some special magic required in the driver. Maybe that was for HS400 only? Again, what board was this on? Thanks ChenYu