From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>,
Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Hans de Goede <hdegoede@redhat.com>,
Mylene Josserand <mylene.josserand@free-electrons.com>,
linux-clk <linux-clk@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Subject: Re: [PATCH v2 6/7] clk: sunxi-ng: Add A23 CCU
Date: Thu, 8 Sep 2016 16:32:25 +0800 [thread overview]
Message-ID: <CAGb2v64JhY7KoaxGkpeGinLZ2GoYWyDj+UjE_JwLW_4sVYd_9w@mail.gmail.com> (raw)
In-Reply-To: <20160908082939.GJ8913@lukather>
On Thu, Sep 8, 2016 at 4:29 PM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Wed, Sep 07, 2016 at 03:24:11PM +0800, Chen-Yu Tsai wrote:
>> > + [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw,
>>
>> A23 manual and Allwinner sources say there is a bus gate for SPINLOCK.
>> Tested it myself, and it indeed exists.
>
> Yes, sorry. It was supposed to be spinlock instead of msgbox.
>
>> > + [RST_BUS_SPINLOCK] = { 0x2c4, BIT(22) },
>>
>> Allwinner sources say there is a reset control for MSGBOX.
>> Tested it myself, and it indeed exists.
>
> However, the msgbox is mentionned nowhere in the datasheet.
>
> I'd prefer to be able to test that it actually works before adding it
> to the clock driver.
I did in fact test it. With reset asserted, writes get ignored,
and reads produce all 0s. With the reset deasserted and clock
enabled, reads give the default value and writes stick. Afterwards
when I toggle the reset, the values revert to the default.
ChenYu
next prev parent reply other threads:[~2016-09-08 8:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-06 12:18 [PATCH v2 0/7] clk: sunxi-ng: Introduce support for A23 and A33 CCUs Maxime Ripard
2016-09-06 12:18 ` [PATCH v2 1/7] clk: sunxi-ng: div: Add mux table macros Maxime Ripard
2016-09-06 12:18 ` [PATCH v2 2/7] clk: sunxi-ng: div: Allow to set a maximum Maxime Ripard
2016-09-06 16:20 ` Chen-Yu Tsai
2016-09-08 8:53 ` Maxime Ripard
2016-09-06 12:18 ` [PATCH v2 3/7] clk: sunxi-ng: mux: Add mux table macro Maxime Ripard
2016-09-06 12:18 ` [PATCH v2 4/7] clk: sunxi-ng: Add N-class clocks support Maxime Ripard
2016-09-07 6:45 ` Chen-Yu Tsai
2016-09-06 12:18 ` [PATCH v2 5/7] clk: sunxi-ng: Add A33 CCU support Maxime Ripard
2016-09-07 7:06 ` Chen-Yu Tsai
2016-09-06 12:18 ` [PATCH v2 6/7] clk: sunxi-ng: Add A23 CCU Maxime Ripard
2016-09-07 7:24 ` Chen-Yu Tsai
2016-09-08 8:29 ` Maxime Ripard
2016-09-08 8:32 ` Chen-Yu Tsai [this message]
2016-09-08 8:35 ` Chen-Yu Tsai
2016-09-08 9:20 ` Maxime Ripard
2016-09-06 12:18 ` [PATCH v2 7/7] ARM: sun8i: Convert the A23 and A33 to the CCU Maxime Ripard
2016-09-06 14:08 ` Chen-Yu Tsai
2016-09-07 20:37 ` Maxime Ripard
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