From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755011AbcIACme (ORCPT ); Wed, 31 Aug 2016 22:42:34 -0400 Received: from smtp.csie.ntu.edu.tw ([140.112.30.61]:48200 "EHLO smtp.csie.ntu.edu.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753967AbcIACmc (ORCPT ); Wed, 31 Aug 2016 22:42:32 -0400 MIME-Version: 1.0 In-Reply-To: <1472671858-29220-4-git-send-email-jorik@kippendief.biz> References: <1472671858-29220-1-git-send-email-jorik@kippendief.biz> <1472671858-29220-4-git-send-email-jorik@kippendief.biz> From: Chen-Yu Tsai Date: Thu, 1 Sep 2016 10:42:04 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/7] dts: sun8i-h3: add i2c0/i2c1 SoC peripherals To: jorik@kippendief.biz Cc: Rob Herring , Mark Rutland , Russell King , Maxime Ripard , Chen-Yu Tsai , devicetree , linux-arm-kernel , linux-kernel Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 1, 2016 at 3:30 AM, wrote: > From: Jorik Jonker > > This enables the i2c0/i2c1 peripherals of the SoC. There is actually a third > controller, but I do not have a board on hands on which i2c2 is exposed in such > a way that I can verify that it works. If they are listed in the manual, and the interrupts, clocks, resets, pins all exist, that is good enough for me. > > Signed-off-by: Jorik Jonker Acked-by: Chen-Yu Tsai