From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21C23C433ED for ; Tue, 18 May 2021 14:39:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 08DD5611CC for ; Tue, 18 May 2021 14:39:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233986AbhEROlO (ORCPT ); Tue, 18 May 2021 10:41:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57658 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234972AbhEROlH (ORCPT ); Tue, 18 May 2021 10:41:07 -0400 Received: from mail-oi1-x236.google.com (mail-oi1-x236.google.com [IPv6:2607:f8b0:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 12077C06138E for ; Tue, 18 May 2021 07:39:49 -0700 (PDT) Received: by mail-oi1-x236.google.com with SMTP id b25so10032567oic.0 for ; Tue, 18 May 2021 07:39:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=zp3it5Zu0KA9JHtt+jDEOh0cwWAwW8S1nVYQo9cUI6g=; b=M+LBCcMHMPB69ojN8igqTaiE33ZRMpEcF1APy9OlgsLWEwTLhd++g9E5r/PdgPXEYk Sf+oWKImVvjttXeuquw1tqKq5sDT5hjJaJrr+UNwmVU4yyHWnKmjWyMw/MlpRuRujG3f OPz9XnatcZBy1chC6V/PUTr8885yi7PK0DlXuwh780MM5fxWeByS/rU5afx+k05h1jpm 6Fcu7iuPNq3rkO4cA5dE3C1+aLyOA0g1mfkf0PgTpooOLOhwOnpmJucMbwAHPEXBoGUI M0YmbK1i3TawT2Kq/MdoI37cIF1l4xEwiO9riemaM2il88FrHe0Ly8xeiVsF219JVpb/ 6zcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=zp3it5Zu0KA9JHtt+jDEOh0cwWAwW8S1nVYQo9cUI6g=; b=qDDyRMfHb+Pvrb6paFlbuVYY+AcPPBZPHQWt2eC9ACHD4m7cEL6v7EDOFRIKF43QeM 7ZdwzFJ/tPDTaz1n54LI3q0ML51U1WB9fE6Q5B3RjG0UvTasTnPeDvoWvS3vuak4QKDQ wZ2/lo7LUnw7nVfIhycUlVkmKUuHdiRI904JzJFN3cARLPXvOC4oNP/h1n9YWZOdJX92 jyeX7Uluu7n4IPB6VIztubhY2mCLHgcTPbh/3x74xFvXYYXTof2hEBaJ7pG2MjI9UZV/ c6A81J0RbJ7kytsmXZZYi5w69W13y95M/ObovDthEJM7+TlsrUPO5r6bUTr8fgGdASLL noWA== X-Gm-Message-State: AOAM532BprDVBeJO0f7oFAFQ+49yitGMelwvM0L+Lmo0A4vkg7kmNplw GEPTrzOiu55UIGKzWbzi1ymZJvRoG11Ob3PiQ4+POQ== X-Google-Smtp-Source: ABdhPJztinWXNYTl+kiATtOdsiKD/CaM/e4dVlbDyWrHV5TSscaWHVYcyb9gQYVDavq46dJM3FBF4Qd71vU3cs+rKMU= X-Received: by 2002:a05:6808:f0b:: with SMTP id m11mr3641199oiw.12.1621348788489; Tue, 18 May 2021 07:39:48 -0700 (PDT) MIME-Version: 1.0 References: <20210505213731.538612-1-bhupesh.sharma@linaro.org> <20210505213731.538612-17-bhupesh.sharma@linaro.org> In-Reply-To: From: Bhupesh Sharma Date: Tue, 18 May 2021 20:09:37 +0530 Message-ID: Subject: Re: [PATCH v2 16/17] crypto: qce: Defer probe in case interconnect is not yet initialized To: Thara Gopinath Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Rob Herring , Andy Gross , Herbert Xu , "David S . Miller" , Stephen Boyd , Michael Turquette , Vinod Koul , dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bhupesh.linux@gmail.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Thara, On Mon, 10 May 2021 at 18:53, Thara Gopinath wrote: > > > > On 5/5/21 5:37 PM, Bhupesh Sharma wrote: > > On some Qualcomm parts the qce crypto driver needs the interconnect between > > the crypto block and main memory to be initialized first before the crypto > > registers can be accessed. So it makes sense to defer the qce crypto driver > > probing in case the interconnect driver is not yet probed. > > > > This fixes the qce probe failure issues when both qce and > > interconnect drivers are compiled as static part of the kernel. > > > > Cc: Thara Gopinath > > Cc: Bjorn Andersson > > Cc: Rob Herring > > Cc: Andy Gross > > Cc: Herbert Xu > > Cc: David S. Miller > > Cc: Stephen Boyd > > Cc: Michael Turquette > > Cc: Vinod Koul > > Cc: dmaengine@vger.kernel.org > > Cc: linux-clk@vger.kernel.org > > Cc: linux-crypto@vger.kernel.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-kernel@vger.kernel.org > > Cc: bhupesh.linux@gmail.com > > Signed-off-by: Bhupesh Sharma > > --- > > drivers/crypto/qce/core.c | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > > > diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c > > index 3e742e9911fa..9915b184f780 100644 > > --- a/drivers/crypto/qce/core.c > > +++ b/drivers/crypto/qce/core.c > > @@ -222,6 +222,20 @@ static int qce_crypto_probe(struct platform_device *pdev) > > return ret; > > > > qce->mem_path = of_icc_get(qce->dev, "memory"); > > + > > + /* Check for NULL return path, which indicates > > + * interconnect API is disabled or the "interconnects" > > + * DT property is missing. > > + */ > > + if (!qce->mem_path) > > + /* On some qcom parts, the qce crypto block needs interconnect > > + * paths to be configured before the registers can be accessed. > > + * Check here for the same. > > + */ > > + if (!strcmp(of_id->compatible, "qcom,ipq6018-qce") || > > + !strcmp(of_id->compatible, "qcom,sdm845-qce")) > > + return -EPROBE_DEFER; > > + > > Hi Bhupesh, > > You don't need this here. of_icc_get returns -EPROBE_DEFER if the > interconnect provider is not initialized yet. Thanks for the review. Yes, I finished testing all the possible combinations with qce, bam dma and interconnect drivers compiled as modules v/s as static parts of the kernel and we don't need this extra check for the interconnect here. We should be fine with checking just the qce_dma_request() return value and returning early in the qce probe() flow if no dma channels are yet available from the bam dma driver. I have made the changes in v3 and will post it for review shortly. Regards, Bhupesh