From: Amit Kucheria <amitk@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>,
Viresh Kumar <viresh.kumar@linaro.org>,
Rob Herring <robh+dt@kernel.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Linux PM list <linux-pm@vger.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>, LKML <linux-kernel@vger.kernel.org>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Taniya Das <tdas@codeaurora.org>
Subject: Re: [PATCH 2/7] arm64: dts: qcom: sm8250: Add cpufreq hw node
Date: Tue, 8 Sep 2020 17:26:47 +0530 [thread overview]
Message-ID: <CAHLCerMXWsYX85RWYXqb7Ch9KXFsiR0H-Y-L-y68wdtyPFNnvA@mail.gmail.com> (raw)
In-Reply-To: <20200908075716.30357-3-manivannan.sadhasivam@linaro.org>
On Tue, Sep 8, 2020 at 1:27 PM Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores
> on SM8250 SoCs.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Amit Kucheria <amitk@kernel.org>
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> index e7d139e1a6ce..aafb46a26a9c 100644
> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
> @@ -87,6 +87,7 @@
> reg = <0x0 0x0>;
> enable-method = "psci";
> next-level-cache = <&L2_0>;
> + qcom,freq-domain = <&cpufreq_hw 0>;
> L2_0: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -102,6 +103,7 @@
> reg = <0x0 0x100>;
> enable-method = "psci";
> next-level-cache = <&L2_100>;
> + qcom,freq-domain = <&cpufreq_hw 0>;
> L2_100: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -114,6 +116,7 @@
> reg = <0x0 0x200>;
> enable-method = "psci";
> next-level-cache = <&L2_200>;
> + qcom,freq-domain = <&cpufreq_hw 0>;
> L2_200: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -126,6 +129,7 @@
> reg = <0x0 0x300>;
> enable-method = "psci";
> next-level-cache = <&L2_300>;
> + qcom,freq-domain = <&cpufreq_hw 0>;
> L2_300: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -138,6 +142,7 @@
> reg = <0x0 0x400>;
> enable-method = "psci";
> next-level-cache = <&L2_400>;
> + qcom,freq-domain = <&cpufreq_hw 1>;
> L2_400: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -150,6 +155,7 @@
> reg = <0x0 0x500>;
> enable-method = "psci";
> next-level-cache = <&L2_500>;
> + qcom,freq-domain = <&cpufreq_hw 1>;
> L2_500: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -163,6 +169,7 @@
> reg = <0x0 0x600>;
> enable-method = "psci";
> next-level-cache = <&L2_600>;
> + qcom,freq-domain = <&cpufreq_hw 1>;
> L2_600: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -175,6 +182,7 @@
> reg = <0x0 0x700>;
> enable-method = "psci";
> next-level-cache = <&L2_700>;
> + qcom,freq-domain = <&cpufreq_hw 2>;
> L2_700: l2-cache {
> compatible = "cache";
> next-level-cache = <&L3_0>;
> @@ -2076,6 +2084,20 @@
> };
> };
> };
> +
> + cpufreq_hw: cpufreq@18591000 {
> + compatible = "qcom,sm8250-epss";
> + reg = <0 0x18591000 0 0x1000>,
> + <0 0x18592000 0 0x1000>,
> + <0 0x18593000 0 0x1000>;
> + reg-names = "freq-domain0", "freq-domain1",
> + "freq-domain2";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> + clock-names = "xo", "alternate";
> +
> + #freq-domain-cells = <1>;
> + };
> };
>
> timer {
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-09-08 17:05 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-08 7:57 [PATCH 0/7] Add CPUFreq support for SM8250 SoC Manivannan Sadhasivam
2020-09-08 7:57 ` [PATCH 1/7] dt-bindings: cpufreq: cpufreq-qcom-hw: Document SM8250 compatible Manivannan Sadhasivam
2020-09-08 11:56 ` Amit Kucheria
2020-09-08 14:58 ` Bjorn Andersson
2020-09-08 15:10 ` Manivannan Sadhasivam
2020-09-15 16:38 ` Rob Herring
2020-09-08 7:57 ` [PATCH 2/7] arm64: dts: qcom: sm8250: Add cpufreq hw node Manivannan Sadhasivam
2020-09-08 10:39 ` Viresh Kumar
2020-09-08 11:08 ` Manivannan Sadhasivam
2020-09-08 11:12 ` Viresh Kumar
2020-09-08 11:56 ` Amit Kucheria [this message]
2020-09-08 7:57 ` [PATCH 3/7] cpufreq: qcom-hw: Make use of cpufreq driver_data for passing pdev Manivannan Sadhasivam
2020-09-08 10:31 ` Viresh Kumar
2020-09-08 7:57 ` [PATCH 4/7] cpufreq: qcom-hw: Make use of of_match data for offsets and row size Manivannan Sadhasivam
2020-09-08 12:18 ` Amit Kucheria
2020-09-08 15:09 ` Manivannan Sadhasivam
2020-09-08 17:06 ` Amit Kucheria
2020-09-08 15:31 ` Bjorn Andersson
2020-09-08 7:57 ` [PATCH 5/7] cpufreq: qcom-hw: Use regmap for accessing hardware registers Manivannan Sadhasivam
2020-09-08 10:34 ` Viresh Kumar
2020-09-08 11:11 ` Manivannan Sadhasivam
2020-09-08 11:18 ` Viresh Kumar
2020-09-08 11:28 ` Manivannan Sadhasivam
2020-09-08 11:48 ` Amit Kucheria
2020-09-08 12:08 ` Amit Kucheria
2020-09-08 15:03 ` Manivannan Sadhasivam
2020-09-09 4:35 ` Viresh Kumar
2020-09-08 14:08 ` Sudeep Holla
2020-09-08 15:39 ` Bjorn Andersson
2020-09-08 7:57 ` [PATCH 6/7] cpufreq: qcom-hw: Add cpufreq support for SM8250 SoC Manivannan Sadhasivam
2020-09-08 12:10 ` Amit Kucheria
2020-09-08 15:22 ` Bjorn Andersson
2020-09-08 15:29 ` Manivannan Sadhasivam
2020-09-08 7:57 ` [PATCH 7/7] cpufreq: qcom-hw: Use devm_platform_ioremap_resource() to simplify code Manivannan Sadhasivam
2020-09-08 10:36 ` Viresh Kumar
2020-09-08 11:12 ` Manivannan Sadhasivam
2020-09-08 12:00 ` Amit Kucheria
2020-09-08 15:35 ` Bjorn Andersson
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