From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932492AbbCMPg3 (ORCPT ); Fri, 13 Mar 2015 11:36:29 -0400 Received: from mail-yk0-f175.google.com ([209.85.160.175]:38925 "EHLO mail-yk0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750830AbbCMPgZ (ORCPT ); Fri, 13 Mar 2015 11:36:25 -0400 MIME-Version: 1.0 In-Reply-To: References: <54F96F5B.2090601@huawei.com> <54F9DACA.3020103@hurleysoftware.com> <54FD4779.3020902@huawei.com> <1425907939.3838.182.camel@linux.intel.com> <1425913502.3838.185.camel@linux.intel.com> Date: Fri, 13 Mar 2015 17:36:24 +0200 Message-ID: Subject: Re: [RFC] With 8250 Designware UART, if writes to the LCR failed the kernel will hung up From: Andy Shevchenko To: Tim Kryger Cc: Alan Cox , "long.wanglong" , Peter Hurley , Zhang Zhen , linux-serial@vger.kernel.org, Linux Kernel Mailing List , Greg Kroah-Hartman , Jamie Iles , Arnd Bergmann , shenjiangjiang@huawei.com, Wang Kai Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 10, 2015 at 4:47 AM, Tim Kryger wrote: > On Mon, Mar 9, 2015 at 8:05 AM, Alan Cox wrote: > >> Ah no - I meant what is their official software workaround for existing >> parts with the bug ? Presumably they have an errata document that >> discusses this and the correct methods they recommend to avoid the >> hang ? > > As far as I know, the only advice they provided was rather naive. > > The documentation I saw suggested stashing a copy of the LCR and then > rewriting it when the special LCR write failed interrupt was raised. > > That approach was not workable as the LCR might be written while the > interrupt is masked causing the sequence of register writes to occur > in an order other than what was desired. > > Additionally, when the LCR needed to be re-written but the UART stayed > busy, the interrupt would keep firing and the driver would starve out > everything else on the CPU. > > The current workaround of clearing fifos and retrying a fixed number > of times isn't ideal but I'm not sure what else can be done given the > way this hardware works. > > Additional background is in c49436b657d0a56a6ad90d14a7c3041add7cf64d I hit the similar problem as Zhang described quite long ago when I tried to write to the port chosen as console. In my case seems the same (DW) IP is enumerated via PCI. Do we need to tweak PCI cases as well? -- With Best Regards, Andy Shevchenko