From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: "Wolfram Sang" <wsa@the-dreams.de>,
"Rob Herring" <robh+dt@kernel.org>,
"Andreas Färber" <afaerber@suse.de>,
"Linus Walleij" <linus.walleij@linaro.org>,
linux-i2c <linux-i2c@vger.kernel.org>,
刘炜 <liuwei@actions-semi.com>,
mp-cs@actions-semi.com, 96boards@ucrobotics.com,
devicetree <devicetree@vger.kernel.org>,
"Daniel Thompson" <daniel.thompson@linaro.org>,
amit.kucheria@linaro.org,
"linux-arm Mailing List" <linux-arm-kernel@lists.infradead.org>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
hzhang@ucrobotics.com, bdong@ucrobotics.com,
"Mani Sadhasivam" <manivannanece23@gmail.com>,
"Thomas Liau" <thomas.liau@actions-semi.com>,
jeff.chen@actions-semi.com
Subject: Re: [PATCH v2 5/6] i2c: Add Actions Semi OWL family S900 I2C driver
Date: Sat, 30 Jun 2018 15:14:37 +0300 [thread overview]
Message-ID: <CAHp75Vd__qOXVxZTdxREwD6p1sEw49R2Kqb+esAmr_EhtT=gFg@mail.gmail.com> (raw)
In-Reply-To: <20180628181042.2239-6-manivannan.sadhasivam@linaro.org>
On Thu, Jun 28, 2018 at 9:10 PM, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
> Add Actions Semi OWL family S900 I2C driver.
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/io.h>
Perhaps keep in order?
> +#define OWL_I2C_DEFAULT_SPEED 100000
> +#define OWL_I2C_MAX_SPEED 400000
..._SPEED -> ..._SPEED_HZ ?
DEFAULT -> DEF ?
> +static int owl_i2c_reset(struct owl_i2c_dev *i2c_dev)
> +{
> + unsigned int val, timeout = 0;
> +
> + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
> + OWL_I2C_CTL_EN, false);
> + mdelay(1);
1 ms keeping CPU busy for nothing. Perhaps usleep_range() / msleep()?
Is it called in atomic context?
> + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_CTL,
> + OWL_I2C_CTL_EN, true);
> +
> + /* Reset FIFO */
> + owl_i2c_update_reg(i2c_dev->base + OWL_I2C_REG_FIFOCTL,
> + OWL_I2C_FIFOCTL_RFR | OWL_I2C_FIFOCTL_TFR,
> + true);
> +
> + /* Wait 50ms for FIFO reset complete */
> + do {
> + val = readl(i2c_dev->base + OWL_I2C_REG_FIFOCTL);
> + if (!(val & (OWL_I2C_FIFOCTL_RFR | OWL_I2C_FIFOCTL_TFR)))
> + break;
> + mdelay(1);
Ditto.
> + } while (timeout++ < OWL_I2C_MAX_RETRIES);
OK, I see you call it from IRQ context. 50ms for IRQ handler is
inappropriate. (1ms either, but at least not so drastically).
> +}
> +static irqreturn_t owl_i2c_interrupt(int irq, void *_dev)
> +{
> + stat = readl(i2c_dev->base + OWL_I2C_REG_STAT);
> + if (stat & OWL_I2C_STAT_BEB) {
> + dev_dbg(&i2c_dev->adap.dev, "bus error");
> + owl_i2c_reset(i2c_dev);
This is questionable to be here (looking at so loong delays in it).
> + goto stop;
> + }
> + return IRQ_HANDLED;
> +}
> +static int owl_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
> + int num)
> +{
> + int ret = 0, idx;
Redundant assignment.
> + ret = owl_i2c_hw_init(i2c_dev);
> + if (ret)
> + return ret;
> +}
> +static const struct i2c_algorithm owl_i2c_algorithm = {
> + .master_xfer = owl_i2c_master_xfer,
> + .functionality = owl_i2c_func
Slightly better to keep comma at the end
> +};
> +
> +static const struct i2c_adapter_quirks owl_i2c_quirks = {
> + .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST,
> + .max_read_len = 240,
> + .max_write_len = 240,
> + .max_comb_1st_msg_len = 6,
> + .max_comb_2nd_msg_len = 240
Ditto.
> +};
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2018-06-30 12:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-28 18:10 [PATCH v2 0/6] Add Actions Semi S900 I2C support Manivannan Sadhasivam
2018-06-28 18:10 ` [PATCH v2 1/6] dt-bindings: i2c: Add binding for Actions Semi OWL I2C controller Manivannan Sadhasivam
2018-06-30 12:23 ` Andreas Färber
2018-06-30 12:40 ` Manivannan Sadhasivam
2018-06-28 18:10 ` [PATCH v2 2/6] arm64: dts: actions: Add Actions Semi S900 I2C controller nodes Manivannan Sadhasivam
2018-06-28 18:10 ` [PATCH v2 3/6] arm64: dts: actions: Add pinctrl definition for S900 I2C controller Manivannan Sadhasivam
2018-06-28 18:10 ` [PATCH v2 4/6] arm64: dts: actions: Enable I2C1 and I2C2 in Bubblegum-96 board Manivannan Sadhasivam
2018-06-28 18:10 ` [PATCH v2 5/6] i2c: Add Actions Semi OWL family S900 I2C driver Manivannan Sadhasivam
2018-06-29 4:45 ` Peter Rosin
2018-06-30 8:13 ` Manivannan Sadhasivam
2018-06-30 12:14 ` Andy Shevchenko [this message]
2018-06-30 12:44 ` Manivannan Sadhasivam
2018-06-30 13:04 ` Andy Shevchenko
2018-06-30 13:14 ` Manivannan Sadhasivam
2018-06-28 18:10 ` [PATCH v2 6/6] MAINTAINERS: Add entry for Actions Semi OWL " Manivannan Sadhasivam
2018-06-29 4:13 ` [PATCH v2 0/6] Add Actions Semi S900 I2C support Peter Rosin
2018-06-29 4:44 ` Manivannan Sadhasivam
2018-06-29 5:09 ` Peter Rosin
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