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From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Andy Shevchenko <andy@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Bartosz Golaszewski <brgl@bgdev.pl>
Subject: Re: [PATCH v1 1/3] gpio: crystalcove: make irq_chip immutable
Date: Wed, 1 Jun 2022 17:48:08 +0200	[thread overview]
Message-ID: <CAHp75VdezsaTyhJxhun+HG8M=q9cOQJKvNSOdcv90fXcn2mu-Q@mail.gmail.com> (raw)
In-Reply-To: <20220601150446.25866-1-andriy.shevchenko@linux.intel.com>

On Wed, Jun 1, 2022 at 5:04 PM Andy Shevchenko
<andriy.shevchenko@linux.intel.com> wrote:

...

> +       gpiochip_enable_irq(gc, hwirq);

I think we do not need to do this for pins that we do not touch as
IRQs (they are vGPIOs with GPE capabilities, AFAIR).

> -       if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
> +       if (hwirq < CRYSTALCOVE_GPIO_NUM) {
>                 cg->set_irq_mask = false;
>                 cg->update |= UPDATE_IRQ_MASK;
>         }

...

> -       if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
> +       if (hwirq < CRYSTALCOVE_GPIO_NUM) {
>                 cg->set_irq_mask = true;
>                 cg->update |= UPDATE_IRQ_MASK;
>         }
> +
> +       gpiochip_disable_irq(gc, hwirq);

Ditto.

-- 
With Best Regards,
Andy Shevchenko

      parent reply	other threads:[~2022-06-01 15:48 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-01 15:04 [PATCH v1 1/3] gpio: crystalcove: make irq_chip immutable Andy Shevchenko
2022-06-01 15:04 ` [PATCH v1 2/3] gpio: crystalcove: Use specific type and API for IRQ number Andy Shevchenko
2022-06-01 15:04 ` [PATCH v1 3/3] gpio: crystalcove: Join function declarations and long lines Andy Shevchenko
2022-06-01 15:46 ` [PATCH v1 1/3] gpio: crystalcove: make irq_chip immutable Andy Shevchenko
2022-06-01 15:48 ` Andy Shevchenko [this message]

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