From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: "Christian König" <deathsimple@vodafone.de>
Cc: helgaas@kernel.org,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
dri-devel@lists.freedesktop.org,
Platform Driver <platform-driver-x86@vger.kernel.org>,
amd-gfx@lists.freedesktop.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors
Date: Mon, 13 Mar 2017 18:49:00 +0200 [thread overview]
Message-ID: <CAHp75Ve4RXtuh7=8FUDv8RXGFMuYLte9GCOd02Y427BrFtPzYA@mail.gmail.com> (raw)
In-Reply-To: <1489408896-25039-4-git-send-email-deathsimple@vodafone.de>
On Mon, Mar 13, 2017 at 2:41 PM, Christian König
<deathsimple@vodafone.de> wrote:
> Most BIOS don't enable this because of compatibility reasons.
>
> Manually enable a 64bit BAR of 64GB size so that we have
> enough room for PCI devices.
> +static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
> +{
> + const uint64_t size = 64ULL * 1024 * 1024 * 1024;
Perhaps extend <linux/sizes.h> and use SZ_64G here?
It would be nice to do, since some of the drivers already are using
sizes like 4GB and alike.
> + uint32_t base, limit, high;
> + struct resource *res;
> + unsigned i;
> + int r;
> +
> + for (i = 0; i < 8; ++i) {
> +
Redundant empty line.
> + pci_read_config_dword(dev, 0x80 + i * 0x8, &base);
> + pci_read_config_dword(dev, 0x180 + i * 0x4, &high);
> +
> + /* Is this slot free? */
> + if ((base & 0x3) == 0x0)
> + break;
> +
> + base >>= 8;
> + base |= high << 24;
> +
> + /* Abort if a slot already configures a 64bit BAR. */
> + if (base > 0x10000)
> + return;
> +
Ditto.
> + }
> +
Ditto.
> + if (i == 8)
> + return;
> +
> + res = kzalloc(sizeof(*res), GFP_KERNEL);
> + res->flags = IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_MEM_64 |
> + IORESOURCE_WINDOW;
> + res->name = dev->bus->name;
> + r = allocate_resource(&iomem_resource, res, size, 0x100000000,
> + 0xfd00000000, size, NULL, NULL);
> + if (r) {
> + kfree(res);
> + return;
> + }
> +
> + base = ((res->start >> 8) & 0xffffff00) | 0x3;
> + limit = ((res->end + 1) >> 8) & 0xffffff00;
> + high = ((res->start >> 40) & 0xff) |
> + ((((res->end + 1) >> 40) & 0xff) << 16);
Perhaps some of constants can be replaced by defines (I think some of
them are already defined in ioport.h or somewhere else).
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2017-03-13 16:49 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-13 12:41 Resizeable PCI BAR support V3 Christian König
2017-03-13 12:41 ` [PATCH 1/4] PCI: add resizeable BAR infrastructure v3 Christian König
2017-03-14 13:09 ` kbuild test robot
2017-03-24 15:28 ` Bjorn Helgaas
2017-03-13 12:41 ` [PATCH 2/4] PCI: add functionality for resizing resources v2 Christian König
2017-03-13 16:43 ` Andy Shevchenko
2017-04-11 9:14 ` Christian König
2017-03-14 9:01 ` kbuild test robot
2017-03-24 21:34 ` Bjorn Helgaas
2017-04-11 15:37 ` Christian König
2017-04-12 16:37 ` Bjorn Helgaas
2017-03-13 12:41 ` [PATCH 3/4] x86/PCI: Enable a 64bit BAR on AMD Family 15h (Models 30h-3fh) Processors Christian König
2017-03-13 16:49 ` Andy Shevchenko [this message]
2017-04-11 9:21 ` Christian König
2017-03-14 9:25 ` kbuild test robot
2017-03-24 15:47 ` Bjorn Helgaas
2017-04-11 15:48 ` Christian König
2017-04-12 16:55 ` Bjorn Helgaas
2017-04-25 13:01 ` Christian König
2017-05-17 21:36 ` Bjorn Helgaas
2017-03-13 12:41 ` [PATCH 4/4] drm/amdgpu: resize VRAM BAR for CPU access Christian König
2017-03-13 16:51 ` Andy Shevchenko
2017-03-15 7:23 ` Ayyappa Ch
2017-03-15 7:37 ` Christian König
2017-03-15 8:25 ` Zhou, David(ChunMing)
2017-03-15 9:29 ` Christian König
2017-03-16 2:19 ` Zhang, Jerry
2017-03-16 2:25 ` Alex Deucher
2017-03-16 2:41 ` Zhang, Jerry
2017-03-23 14:30 ` Sagalovitch, Serguei
2017-03-23 15:56 ` Christian König
2017-03-15 10:42 ` Ayyappa Ch
2017-03-15 11:03 ` Christian König
2017-03-15 16:08 ` Deucher, Alexander
2017-03-24 21:42 ` Bjorn Helgaas
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