From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751571AbdDBOKF (ORCPT ); Sun, 2 Apr 2017 10:10:05 -0400 Received: from mail-qk0-f179.google.com ([209.85.220.179]:35626 "EHLO mail-qk0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751465AbdDBOKD (ORCPT ); Sun, 2 Apr 2017 10:10:03 -0400 MIME-Version: 1.0 In-Reply-To: <4e66c12e4576c56c675d049af8b063d3ccd65d17.1491002056.git.sathyanarayanan.kuppuswamy@linux.intel.com> References: <20170331133728.GA23725@rajaneesh-OptiPlex-9010> <4e66c12e4576c56c675d049af8b063d3ccd65d17.1491002056.git.sathyanarayanan.kuppuswamy@linux.intel.com> From: Andy Shevchenko Date: Sun, 2 Apr 2017 17:10:02 +0300 Message-ID: Subject: Re: [PATCH v4 4/5] platform/x86: intel_pmc_ipc: Fix iTCO GCS memory mapping failure To: Kuppuswamy Sathyanarayanan Cc: Andy Shevchenko , Zha Qipeng , "dvhart@infradead.org" , Guenter Roeck , Wim Van Sebroeck , sathyaosid@gmail.com, David Box , Rajneesh Bhardwaj , Platform Driver , "linux-kernel@vger.kernel.org" , linux-watchdog@vger.kernel.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Apr 1, 2017 at 2:27 AM, Kuppuswamy Sathyanarayanan wrote: > iTCO watchdog driver need access to PMC_CFG GCR register to modify iTCO_wdt or use above in the rest of the series. So, choose one and use it everywhere in your patch series. > the no reboot setting. Currently, this is done by passing PMC_CFG reg > address as memory resource to watchdog driver and allowing it directly > modify the PMC_CFG register. But currently PMC driver also has > requirement to memory map the entire GCR register space in this driver. > This causes mem request failure in watchdog driver. So this patch fixes > this issue by adding api to update noreboot flag and passes them > to watchdog driver via platform data. > +static int update_noreboot_bit(bool status) > +{ > + if (status) > + return intel_pmc_gcr_update(PMC_GCR_PMC_CFG_REG, BIT(4), > + BIT(4)); BIT(4) is a magic. Moreover, it's used as mask and value here, you might introduce temporary variables for better understanding what is what. As an example you may look at drivers/acpi/acpi_lpss.c (code related to IOSF MBI interaction). > + else Redundant. -- With Best Regards, Andy Shevchenko