From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>
Cc: LKML <linux-kernel@vger.kernel.org>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Mark Gross <mgross@linux.intel.com>,
Tony Luck <tony.luck@intel.com>,
Darren Hart <dvhart@infradead.org>,
Andy Shevchenko <andy@infradead.org>,
Platform Driver <platform-driver-x86@vger.kernel.org>,
Paolo Bonzini <pbonzini@redhat.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Len Brown <lenb@kernel.org>,
ACPI Devel Maling List <linux-acpi@vger.kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>,
Linux PM <linux-pm@vger.kernel.org>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
linux-edac@vger.kernel.org, Jean Delvare <jdelvare@suse.com>,
Guenter Roeck <linux@roeck-us.net>,
linux-hwmon@vger.kernel.org, Zhang Rui <rui.zhang@intel.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Amit Kucheria <amit.kucheria@verdurent.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
linux-mmc <linux-mmc@vger.kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, Takashi Iwai <tiwai@suse.com>,
ALSA Development Mailing List <alsa-devel@alsa-project.org>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
linux-crypto <linux-crypto@vger.kernel.org>
Subject: Re: [patch 11/22] platform/x86: Convert to new CPU match macros
Date: Fri, 20 Mar 2020 16:52:40 +0200 [thread overview]
Message-ID: <CAHp75Veb_9a7adSZ__j0viFvTi-eRzeJqMphwOL-yjvfqom3Hw@mail.gmail.com> (raw)
In-Reply-To: <20200320131509.766573641@linutronix.de>
On Fri, Mar 20, 2020 at 3:18 PM Thomas Gleixner <tglx@linutronix.de> wrote:
>
> The new macro set has a consistent namespace and uses C99 initializers
> instead of the grufty C89 ones.
>
> Get rid the of the local macro wrappers for consistency.
>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Cc: Darren Hart <dvhart@infradead.org>
> Cc: Andy Shevchenko <andy@infradead.org>
> Cc: platform-driver-x86@vger.kernel.org
> ---
> drivers/platform/x86/intel-uncore-frequency.c | 14 ++---
> drivers/platform/x86/intel_int0002_vgpio.c | 4 -
> drivers/platform/x86/intel_mid_powerbtn.c | 4 -
> drivers/platform/x86/intel_pmc_core.c | 24 +++++-----
> drivers/platform/x86/intel_pmc_core_pltdrv.c | 16 +++---
> drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c | 4 -
> drivers/platform/x86/intel_telemetry_debugfs.c | 5 --
> drivers/platform/x86/intel_telemetry_pltdrv.c | 7 --
> drivers/platform/x86/intel_turbo_max_3.c | 6 --
> 9 files changed, 37 insertions(+), 47 deletions(-)
>
> --- a/drivers/platform/x86/intel-uncore-frequency.c
> +++ b/drivers/platform/x86/intel-uncore-frequency.c
> @@ -358,15 +358,13 @@ static struct notifier_block uncore_pm_n
> .notifier_call = uncore_pm_notify,
> };
>
> -#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
> -
> static const struct x86_cpu_id intel_uncore_cpu_ids[] = {
> - ICPU(INTEL_FAM6_BROADWELL_G),
> - ICPU(INTEL_FAM6_BROADWELL_X),
> - ICPU(INTEL_FAM6_BROADWELL_D),
> - ICPU(INTEL_FAM6_SKYLAKE_X),
> - ICPU(INTEL_FAM6_ICELAKE_X),
> - ICPU(INTEL_FAM6_ICELAKE_D),
> + X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_G, NULL),
> + X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL),
> + X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_D, NULL),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
> + X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, NULL),
> + X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, NULL),
> {}
> };
>
> --- a/drivers/platform/x86/intel_int0002_vgpio.c
> +++ b/drivers/platform/x86/intel_int0002_vgpio.c
> @@ -148,8 +148,8 @@ static struct irq_chip int0002_cht_irqch
> };
>
> static const struct x86_cpu_id int0002_cpu_ids[] = {
> - INTEL_CPU_FAM6(ATOM_SILVERMONT, int0002_byt_irqchip), /* Valleyview, Bay Trail */
> - INTEL_CPU_FAM6(ATOM_AIRMONT, int0002_cht_irqchip), /* Braswell, Cherry Trail */
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, &int0002_byt_irqchip),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, &int0002_cht_irqchip),
> {}
> };
>
> --- a/drivers/platform/x86/intel_mid_powerbtn.c
> +++ b/drivers/platform/x86/intel_mid_powerbtn.c
> @@ -113,8 +113,8 @@ static const struct mid_pb_ddata mrfld_d
> };
>
> static const struct x86_cpu_id mid_pb_cpu_ids[] = {
> - INTEL_CPU_FAM6(ATOM_SALTWELL_MID, mfld_ddata),
> - INTEL_CPU_FAM6(ATOM_SILVERMONT_MID, mrfld_ddata),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_SALTWELL_MID, &mfld_ddata),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT_MID, &mrfld_ddata),
> {}
> };
>
> --- a/drivers/platform/x86/intel_pmc_core.c
> +++ b/drivers/platform/x86/intel_pmc_core.c
> @@ -871,18 +871,18 @@ static inline void pmc_core_dbgfs_unregi
> #endif /* CONFIG_DEBUG_FS */
>
> static const struct x86_cpu_id intel_pmc_core_ids[] = {
> - INTEL_CPU_FAM6(SKYLAKE_L, spt_reg_map),
> - INTEL_CPU_FAM6(SKYLAKE, spt_reg_map),
> - INTEL_CPU_FAM6(KABYLAKE_L, spt_reg_map),
> - INTEL_CPU_FAM6(KABYLAKE, spt_reg_map),
> - INTEL_CPU_FAM6(CANNONLAKE_L, cnp_reg_map),
> - INTEL_CPU_FAM6(ICELAKE_L, icl_reg_map),
> - INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map),
> - INTEL_CPU_FAM6(COMETLAKE, cnp_reg_map),
> - INTEL_CPU_FAM6(COMETLAKE_L, cnp_reg_map),
> - INTEL_CPU_FAM6(TIGERLAKE_L, tgl_reg_map),
> - INTEL_CPU_FAM6(TIGERLAKE, tgl_reg_map),
> - INTEL_CPU_FAM6(ATOM_TREMONT, tgl_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &spt_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &spt_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &spt_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &spt_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &cnp_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_NNPI, &icl_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &cnp_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &cnp_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &tgl_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &tgl_reg_map),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &tgl_reg_map),
> {}
> };
>
> --- a/drivers/platform/x86/intel_pmc_core_pltdrv.c
> +++ b/drivers/platform/x86/intel_pmc_core_pltdrv.c
> @@ -38,14 +38,14 @@ static struct platform_device pmc_core_d
> * other list may grow, but this list should not.
> */
> static const struct x86_cpu_id intel_pmc_core_platform_ids[] = {
> - INTEL_CPU_FAM6(SKYLAKE_L, pmc_core_device),
> - INTEL_CPU_FAM6(SKYLAKE, pmc_core_device),
> - INTEL_CPU_FAM6(KABYLAKE_L, pmc_core_device),
> - INTEL_CPU_FAM6(KABYLAKE, pmc_core_device),
> - INTEL_CPU_FAM6(CANNONLAKE_L, pmc_core_device),
> - INTEL_CPU_FAM6(ICELAKE_L, pmc_core_device),
> - INTEL_CPU_FAM6(COMETLAKE, pmc_core_device),
> - INTEL_CPU_FAM6(COMETLAKE_L, pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(CANNONLAKE_L, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, &pmc_core_device),
> + X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE_L, &pmc_core_device),
> {}
> };
> MODULE_DEVICE_TABLE(x86cpu, intel_pmc_core_platform_ids);
> --- a/drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c
> +++ b/drivers/platform/x86/intel_speed_select_if/isst_if_mbox_msr.c
> @@ -160,10 +160,8 @@ static struct notifier_block isst_pm_nb
> .notifier_call = isst_pm_notify,
> };
>
> -#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
> -
> static const struct x86_cpu_id isst_if_cpu_ids[] = {
> - ICPU(INTEL_FAM6_SKYLAKE_X),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
> {}
> };
> MODULE_DEVICE_TABLE(x86cpu, isst_if_cpu_ids);
> --- a/drivers/platform/x86/intel_telemetry_debugfs.c
> +++ b/drivers/platform/x86/intel_telemetry_debugfs.c
> @@ -308,11 +308,10 @@ static struct telemetry_debugfs_conf tel
> };
>
> static const struct x86_cpu_id telemetry_debugfs_cpu_ids[] = {
> - INTEL_CPU_FAM6(ATOM_GOLDMONT, telem_apl_debugfs_conf),
> - INTEL_CPU_FAM6(ATOM_GOLDMONT_PLUS, telem_apl_debugfs_conf),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_debugfs_conf),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_apl_debugfs_conf),
> {}
> };
> -
> MODULE_DEVICE_TABLE(x86cpu, telemetry_debugfs_cpu_ids);
>
> static int telemetry_debugfs_check_evts(void)
> --- a/drivers/platform/x86/intel_telemetry_pltdrv.c
> +++ b/drivers/platform/x86/intel_telemetry_pltdrv.c
> @@ -67,9 +67,6 @@
> #define TELEM_CLEAR_VERBOSITY_BITS(x) ((x) &= ~(BIT(27) | BIT(28)))
> #define TELEM_SET_VERBOSITY_BITS(x, y) ((x) |= ((y) << 27))
>
> -#define TELEM_CPU(model, data) \
> - { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&data }
> -
> enum telemetry_action {
> TELEM_UPDATE = 0,
> TELEM_ADD,
> @@ -183,8 +180,8 @@ static struct telemetry_plt_config telem
> };
>
> static const struct x86_cpu_id telemetry_cpu_ids[] = {
> - TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT, telem_apl_config),
> - TELEM_CPU(INTEL_FAM6_ATOM_GOLDMONT_PLUS, telem_glk_config),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT, &telem_apl_config),
> + X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &telem_glk_config),
> {}
> };
>
> --- a/drivers/platform/x86/intel_turbo_max_3.c
> +++ b/drivers/platform/x86/intel_turbo_max_3.c
> @@ -113,11 +113,9 @@ static int itmt_legacy_cpu_online(unsign
> return 0;
> }
>
> -#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
> -
> static const struct x86_cpu_id itmt_legacy_cpu_ids[] = {
> - ICPU(INTEL_FAM6_BROADWELL_X),
> - ICPU(INTEL_FAM6_SKYLAKE_X),
> + X86_MATCH_INTEL_FAM6_MODEL(BROADWELL_X, NULL),
> + X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_X, NULL),
> {}
> };
>
>
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-03-20 14:52 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-20 13:13 [patch 00/22] x86/treewide: Consolidate CPU match macro maze and get rid of C89 (sic!) initializers Thomas Gleixner
2020-03-20 13:13 ` [patch 01/22] x86/devicetable: Move x86 specific macro out of generic code Thomas Gleixner
2020-03-20 14:33 ` Andy Shevchenko
2020-03-20 20:24 ` Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 02/22] x86/cpu: Add conistent CPU match macros Thomas Gleixner
2020-03-20 14:29 ` Bjorn Helgaas
2020-03-20 14:39 ` Andy Shevchenko
2020-03-20 20:27 ` Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] x86/cpu: Add consistent " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 03/22] x86/cpu/bugs: Convert to new matching macros Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 04/22] x86/perf/events: Convert to new CPU match macros Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 05/22] x86/kvm: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 06/22] x86/kernel: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 07/22] x86/platform: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 08/22] ACPI: Convert to new X86 " Thomas Gleixner
2020-03-20 14:47 ` Andy Shevchenko
2020-03-20 20:32 ` Thomas Gleixner
2020-03-23 16:38 ` mark gross
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 09/22] cpufreq: " Thomas Gleixner
2020-03-20 14:50 ` Andy Shevchenko
2020-03-20 20:30 ` Thomas Gleixner
2020-03-20 21:52 ` Andy Shevchenko
2020-03-20 22:18 ` Thomas Gleixner
2020-03-24 13:51 ` [patch V2 " Thomas Gleixner
2020-03-24 15:37 ` Rafael J. Wysocki
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
[not found] ` <20200324060124.GC11705@shao2-debian>
2020-03-24 10:24 ` [cpufreq] 06c4d00466: will-it-scale.per_process_ops -53.4% regression Andy Shevchenko
2020-03-24 15:38 ` Srinivas Pandruvada
2020-03-25 7:51 ` Rong Chen
2020-03-25 7:50 ` Rong Chen
2020-03-25 10:32 ` Thomas Gleixner
2020-03-26 8:33 ` kernel test robot
2020-03-25 12:41 ` [tip: x86/cpu] cpufreq/intel_pstate: Fix wrong macro conversion tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 10/22] EDAC: Convert to new X86 CPU match macros Thomas Gleixner
2020-03-24 19:31 ` Luck, Tony
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 11/22] platform/x86: Convert to new " Thomas Gleixner
2020-03-20 14:52 ` Andy Shevchenko [this message]
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 12/22] hwmon: Convert to new X86 " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 13/22] thermal: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:13 ` [patch 14/22] extcon: axp288: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 15/22] intel_idle: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 16/22] mmc: sdhci-acpi: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 17/22] PCI: intel-mid: " Thomas Gleixner
2020-03-20 14:30 ` Bjorn Helgaas
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 18/22] powercap/intel_rapl: " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 19/22] ASoC: Intel: " Thomas Gleixner
2020-03-20 14:58 ` Andy Shevchenko
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 20/22] crypto: Convert to new " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 21/22] hwrng: via_rng - Convert to new X86 " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] hwrng: via_rng: " tip-bot2 for Thomas Gleixner
2020-03-20 13:14 ` [patch 22/22] x86/cpu: Cleanup the now unused " Thomas Gleixner
2020-03-24 22:32 ` [tip: x86/cpu] " tip-bot2 for Thomas Gleixner
2020-03-20 14:31 ` [patch 00/22] x86/treewide: Consolidate CPU match macro maze and get rid of C89 (sic!) initializers Andy Shevchenko
2020-03-20 14:59 ` Greg Kroah-Hartman
2020-03-24 18:58 ` [PATCH 23/22] x86/smpboot: Remove the last ICPU() macro Borislav Petkov
2020-04-13 8:40 ` [tip: x86/cleanups] " tip-bot2 for Borislav Petkov
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