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From: Andy Shevchenko <andy.shevchenko@gmail.com>
Date: Wed, 19 Apr 2017 23:41:37 +0300
Message-ID: <CAHp75VefVpwf-Ooom9Am3Gfmc8zR31fqWxTzYXest_+YTOk2yg@mail.gmail.com>
Subject: Re: [PATCH v1 1/2] gpio: gpio-wcove: fix GPIO irq status mask
To: Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: Alexandre Courbot <gnurou@gmail.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Sathyanarayanan Kuppuswamy Natarajan <sathyaosid@gmail.com>
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On Fri, Apr 14, 2017 at 8:29 PM,
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>
> According to Whiskey cove PMIC spec, bit 7 of GPIOIRQ0_REG belongs to

cove -> Cove

> battery IO. So we should skip this bit when checking for GPIO irq pending

irq -> IRQ

> status. Otherwise, wcove_gpio_irq_handler() might go into the infinite
> loop until irq "pending" status becomes 0. This patch fixes this issue.

Ditto.

> +#define GPIO_IRQ0_MASK         0x7f
> +#define GPIO_IRQ1_MASK         0x3f

GENMASK()

> -               pending = p[0] | (p[1] << 8);
> +               pending = (p[0] & GPIO_IRQ0_MASK) |
> +                       ((p[1] & GPIO_IRQ1_MASK) << 7);

I would leave this on one line despite 80 characters limit (actually
how long is it?).

-- 
With Best Regards,
Andy Shevchenko