From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: kbuild test robot <lkp@intel.com>
Cc: "Ramuthevar,Vadivel MuruganX"
<vadivel.muruganx.ramuthevar@linux.intel.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"open list:MEMORY TECHNOLOGY..." <linux-mtd@lists.infradead.org>,
devicetree <devicetree@vger.kernel.org>,
kbuild-all@lists.01.org,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>, Vignesh R <vigneshr@ti.com>,
Arnd Bergmann <arnd@arndb.de>,
Brendan Higgins <brendanhiggins@google.com>,
Thomas Gleixner <tglx@linutronix.de>,
Boris Brezillon <boris.brezillon@collabora.com>,
Anders Roxell <anders.roxell@linaro.org>,
masonccyang@mxic.com.tw
Subject: Re: [PATCH v7 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Fri, 15 May 2020 17:25:32 +0300 [thread overview]
Message-ID: <CAHp75Ven9q-6dDYtP_uXigeS_r2uvpUZVR5Mh0RdEd36MbTG+Q@mail.gmail.com> (raw)
In-Reply-To: <202005152142.AWvx4xc5%lkp@intel.com>
On Fri, May 15, 2020 at 4:48 PM kbuild test robot <lkp@intel.com> wrote:
> sparse warnings: (new ones prefixed by >>)
>
> >> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restricted __be32 [assignedunsigned int val @@
> >> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: expected unsigned int val
> >> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: got restricted __be32 [assigned] [usertype] reg
> drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restricted __be32 [assignedunsigned int val @@
> drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: expected unsigned int val
> drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: got restricted __be32 [assigned] [usertype] reg
>
> 440 reg = cpu_to_be32(*pdata++);
> > 441 writel(reg, ebu_host->hsnand + HSNAND_CMSG_0);
> 442
> 443 reg = cpu_to_be32(*pdata);
> 444 writel(reg, ebu_host->hsnand + HSNAND_CMSG_1);
On BE:
cpu_to_be32 -> no-op
writel() -> converts reg to LE
On LE:
cpu_to_be32 -> converts to BE
writel() -> no-op (in terms of conversion)
Seems to me that the proper API (if above is intended) should be swab32().
But something tells me that above is broken (or my understanding is wrong).
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2020-05-15 14:25 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 10:55 [PATCH v7 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-05-15 10:55 ` [PATCH v7 1/2] dt-bindings: mtd: Add Nand Flash Controller support for " Ramuthevar,Vadivel MuruganX
2020-05-15 10:55 ` [PATCH v7 2/2] mtd: rawnand: Add NAND controller support on " Ramuthevar,Vadivel MuruganX
2020-05-15 11:48 ` Andy Shevchenko
2020-05-15 13:43 ` kbuild test robot
2020-05-15 14:25 ` Andy Shevchenko [this message]
2020-05-15 14:27 ` Andy Shevchenko
2020-05-15 14:30 ` Arnd Bergmann
2020-05-18 11:39 ` Ramuthevar, Vadivel MuruganX
2020-05-18 11:43 ` Andy Shevchenko
2020-05-18 11:57 ` Arnd Bergmann
2020-05-18 13:20 ` Andy Shevchenko
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