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From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Dou Liyang <douly.fnst@cn.fujitsu.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>,
	ebiederm@xmission.com, Baoquan He <bhe@redhat.com>
Subject: Re: [PATCH v4 2/2] x86/apic: Replace common tools with new ones
Date: Mon, 26 Feb 2018 13:50:06 +0200	[thread overview]
Message-ID: <CAHp75Vf6NwsB2CTPThG-95OgD6Xb6AHU2KGRnjxDGk4KP9xyWg@mail.gmail.com> (raw)
In-Reply-To: <20180226023957.22861-2-douly.fnst@cn.fujitsu.com>

On Mon, Feb 26, 2018 at 4:39 AM, Dou Liyang <douly.fnst@cn.fujitsu.com> wrote:
> The pending interrupt check code is old, update the following.
>
>   -Replace for-if pair with for_each_set_bit()
>   -Replace printk() with pr_err()
>
> Also merge the printk's code in one line and make curly braces balanced
>

Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Signed-off-by: Dou Liyang <douly.fnst@cn.fujitsu.com>
> ---
> changlog:
> v3 --> v4:
>   -Fix the wrong check for bit 0 suggested by Andy
>
>  arch/x86/kernel/apic/apic.c | 17 ++++++++---------
>  1 file changed, 8 insertions(+), 9 deletions(-)
>
> diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
> index be223ebd1bb3..81db2aab257b 100644
> --- a/arch/x86/kernel/apic/apic.c
> +++ b/arch/x86/kernel/apic/apic.c
> @@ -1412,7 +1412,8 @@ static void apic_pending_intr_clear(void)
>  {
>         long long max_loops = cpu_khz ? cpu_khz : 1000000;
>         unsigned long long tsc = 0, ntsc;
> -       unsigned int value, queued;
> +       unsigned int queued;
> +       unsigned long value;
>         int i, j, acked = 0;
>
>         if (boot_cpu_has(X86_FEATURE_TSC))
> @@ -1435,24 +1436,22 @@ static void apic_pending_intr_clear(void)
>
>                 for (i = APIC_ISR_NR - 1; i >= 0; i--) {
>                         value = apic_read(APIC_ISR + i*0x10);
> -                       for (j = 31; j >= 0; j--) {
> -                               if (value & (1<<j)) {
> -                                       ack_APIC_irq();
> -                                       acked++;
> -                               }
> +                       for_each_set_bit(j, &value, 32) {
> +                               ack_APIC_irq();
> +                               acked++;
>                         }
>                 }
>                 if (acked > 256) {
> -                       printk(KERN_ERR "LAPIC pending interrupts after %d EOI\n",
> -                              acked);
> +                       pr_err("LAPIC pending interrupts after %d EOI\n", acked);
>                         break;
>                 }
>                 if (queued) {
>                         if (boot_cpu_has(X86_FEATURE_TSC) && cpu_khz) {
>                                 ntsc = rdtsc();
>                                 max_loops = (cpu_khz << 10) - (ntsc - tsc);
> -                       } else
> +                       } else {
>                                 max_loops--;
> +                       }
>                 }
>         } while (queued && max_loops > 0);
>         WARN_ON(max_loops <= 0);
> --
> 2.14.3
>
>
>



-- 
With Best Regards,
Andy Shevchenko

  reply	other threads:[~2018-02-26 11:50 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-26  2:39 [PATCH v4 1/2] x86/apic: Move pending intr check code into it's own function Dou Liyang
2018-02-26  2:39 ` [PATCH v4 2/2] x86/apic: Replace common tools with new ones Dou Liyang
2018-02-26 11:50   ` Andy Shevchenko [this message]
2018-02-28 14:13   ` [tip:x86/apic] " tip-bot for Dou Liyang
2018-02-26 14:52 ` [PATCH v4 1/2] x86/apic: Move pending intr check code into it's own function Andy Shevchenko
2018-02-28 14:12 ` [tip:x86/apic] " tip-bot for Dou Liyang

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