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Wed, 3 Jun 2020 09:22:33 -0400 Received: from mail-ej1-x641.google.com (mail-ej1-x641.google.com [IPv6:2a00:1450:4864:20::641]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 75639C08C5C0 for ; Wed, 3 Jun 2020 06:22:33 -0700 (PDT) Received: by mail-ej1-x641.google.com with SMTP id o15so2115263ejm.12 for ; Wed, 03 Jun 2020 06:22:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=JPwX4c4qU1Ibpfzn0AFffCVAQ4RDh1hSQFVaf4E4RKA=; b=uRBfH3yTtpCBYHHYqQw4B8u3acTPULDVQmRyZV1n6qGJuxks8v0rTqgXHPStIYYK1c N1rci9Zu9HZjsvIYicNlpOOnfBcUi+zs64OWNQwbegqFLg0w/F21FAtX/id2CiMthsJG IRW7xP9h9ez3MFslB17v9wycKadkDxXQcmNWzm72cLT31qCgnjt/fp0XWgPeoO81xINU Q0R/HsMG+7kVTVru2RvbGMitHKBUoUj1JBBUwzBI0MrUdpyfXLslhP5y1lqu+tKA0KPZ 0vG0Muh4/YN4F6c9YSPxSVHnVMdKdbm07Bx2Tr6Ma/NBOqe+lTKepYWYWX48jQcg5joO hjWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=JPwX4c4qU1Ibpfzn0AFffCVAQ4RDh1hSQFVaf4E4RKA=; b=EBxLmS/pzGr1xk9hhs6mUh6IeVZW6X6NNuwvg9kjJe0JGgy1jo+es4waIkqUMBVh25 mmGC6zBQAu8vbTBMbA4VskVUK9vFypdCJRbQhIJYHxF+CBQNt2bNeE3xo4ow0y221zEG oYMuUToOFW67oJd/ON3cB8jEWuasFnIZnWEy1FwXlp+c6z35yYJAJZjCyAOefpusfLtU ikdfkFjW6qltQBUW4EdKkclXEdeBAvOYmPXoD3E67lziGKTczJL9KVYAOFl7Fl6Lm+jQ +zFmZVLjmFleP31B+9XJJWpTAI4LfWY4CXDq3qm7OOLKP611nX7MdUj2eSi8qQC1fOxC ClYA== X-Gm-Message-State: AOAM531gTzdhLgUW81GnD4/QoWmM7V44PQsa/7LZI0J8KGRbnIBSN4Fo jmZn5TzhsCU/V7riXNF7by/8kF7rdX9KP2fzfTPw1w== X-Google-Smtp-Source: ABdhPJy9GE7o2d5AINznqj2b0Dcu519109HaN+lBlE9eMUrNUbmd11s0xZ0qXKihtY+PyNILSWGbMMX9VHcpqTDjQ3s= X-Received: by 2002:a17:907:9484:: with SMTP id dm4mr29506933ejc.56.1591190552082; Wed, 03 Jun 2020 06:22:32 -0700 (PDT) MIME-Version: 1.0 References: <28123d1e19f235f97555ee36a5ed8b52d20cbdea.1590947174.git.saiprakash.ranjan@codeaurora.org> <20200601212858.GB24287@xps15> <6d759cc28628ea72767c1304883630eb@codeaurora.org> <4a09cd2e054836d85f2e024ca4435e91@codeaurora.org> In-Reply-To: <4a09cd2e054836d85f2e024ca4435e91@codeaurora.org> From: Mike Leach Date: Wed, 3 Jun 2020 14:22:21 +0100 Message-ID: Subject: Re: [PATCH 2/2] coresight: tmc: Add shutdown callback for TMC ETR/ETF To: Sai Prakash Ranjan Cc: Mathieu Poirier , Suzuki K Poulose , linux-arm-kernel , Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, Coresight ML , Stephen Boyd , robin.murphy@arm.com Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Sai, On Wed, 3 Jun 2020 at 13:14, Sai Prakash Ranjan wrote: > > Hi Mike, > > On 2020-06-03 16:57, Mike Leach wrote: > > Hi, > > > > On Wed, 3 Jun 2020 at 11:24, Sai Prakash Ranjan > > wrote: > >> > >> Hi Mike, > >> > >> Thanks again for looking at this. > >> > >> On 2020-06-03 03:42, Mike Leach wrote: > >> [...] > >> > >> >> > >> >> SMMU/IOMMU won't be able to do much here as it is the client's > >> >> responsiblity to > >> >> properly shutdown and SMMU device link just makes sure that > >> >> SMMU(supplier) shutdown is > >> >> called only after its consumers shutdown callbacks are called. > >> > > >> > I think this use case can be handled slightly differently than the > >> > general requirements for modular CoreSight drivers. > >> > > >> > What is needed here is a way of stopping the underlying ETR hardware > >> > from issuing data to the SMMU, until the entire device has been shut > >> > down, in a way that does not remove the driver, breaking existing > >> > references and causing a system crash. > >> > > >> > We could introduce a new mode to the ETR driver - e.g. > >> > CS_MODE_SHUTDOWN. > >> > > >> > At the end of the block tmc_shutdown(struct amba_device *adev), set > >> > drvdata->mode to CS_MODE_SHUTDOWN & remove the coresight_unregister(). > >> > This new mode can be used to prevent the underlying hardware from > >> > being able to restart until the device is re-powered. > >> > > >> > This mode can be detected in the code that enables / disables the ETR > >> > and handled appropriately (updates to tmc_enable_etr_sink and > >> > tmc_disable_etr_sink). > >> > This mode will persist until the device is re-started - but because we > >> > are on the device shutdown path this is not an issue. > >> > > >> > This should leave the CoreSight infrastructure stable until the > >> > drivers are shut down normally as part of the device power down > >> > process. > >> > > >> > >> Sounds good to me, but if the coresight_unregister() is the trouble > >> point > >> causing these crashes, then can't we just remove that from > >> tmc_shutdown() > >> callback? This would be like maintaining the same behaviour as now > >> where > >> on reboot/shutdown we basically don't do anything except for disabling > >> ETR. > > > > No - the new mode prevents race conditions where the thread shutting > > down the SMMU does the ETR shutdown, but then another thread happens > > to be trying to start trace and restarts the ETR. > > It also prevents the condition Mathieu discussed where a thread might > > be attempting to shutdown trace - this could try to disable the > > hardware again re-releasing resources/ re-flushing and waiting for > > stop. > > > > I do not think there will a race between SMMU shutdown and ETR shutdown. > Driver core takes care of calling SMMU shutdown after its consumer > shutdown callbacks via device link, otherwise there would already be > bugs in all other client drivers. > I am not saying there could be a race between tmc_shutdowm and Smmu_shutdown - there may be a case if the coresight_disable_path sequence is running and gets to the point of disabling the ETR after the SMMU callback has disabled it. Mike > Thanks, > Sai > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a > member > of Code Aurora Forum, hosted by The Linux Foundation -- Mike Leach Principal Engineer, ARM Ltd. Manchester Design Centre. UK