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charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 28 Nov 2022 at 02:15, Jianlong Huang wrote: > > On Mon, 21 Nov 2022 09:44:00 +0100, Krzysztof Kozlowski wrote: > > On 18/11/2022 02:11, Hal Feng wrote: > >> From: Jianlong Huang > >> > >> Add pinctrl bindings for StarFive JH7110 SoC aon pinctrl controller. > >> > >> Signed-off-by: Jianlong Huang > >> Signed-off-by: Hal Feng > >> --- > >> .../pinctrl/starfive,jh7110-aon-pinctrl.yaml | 134 ++++++++++++++++++ > >> 1 file changed, 134 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml > >> > >> diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml > >> new file mode 100644 > >> index 000000000000..1dd000e1f614 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml > >> @@ -0,0 +1,134 @@ > >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > >> +%YAML 1.2 > >> +--- > >> +$id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml# > >> +$schema: http://devicetree.org/meta-schemas/core.yaml# > >> + > >> +title: StarFive JH7110 Aon Pin Controller > >> + > >> +description: | > >> + Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd. > >> + > >> + Out of the SoC's many pins only the ones named PAD_GPIO0 to PAD_GPIO4 > >> + can be multiplexed and have configurable bias, drive strength, > >> + schmitt trigger etc. > >> + Some peripherals have their I/O go through the 4 "GPIOs". This also > >> + includes PWM. > >> + > >> +maintainers: > >> + - Jianlong Huang > >> + > >> +properties: > >> + compatible: > >> + const: starfive,jh7110-aon-pinctrl > >> + > >> + reg: > >> + maxItems: 1 > >> + > >> + reg-names: > >> + items: > >> + - const: control Again this doesn't seem necessary when you only have 1 memory range. > >> + > >> + clocks: > >> + maxItems: 1 > >> + > >> + resets: > >> + maxItems: 1 > >> + > >> + gpio-controller: true > >> + > >> + "#gpio-cells": > >> + const: 2 > >> + > >> + interrupts: > >> + maxItems: 1 > >> + description: The GPIO parent interrupt. > > > > Same comments apply plus one more. > > Will fix, drop this description. > > > > >> + > >> + interrupt-controller: true > >> + > >> + "#interrupt-cells": > >> + const: 2 > >> + > >> +required: > >> + - compatible > >> + - reg > >> + - reg-names > >> + - gpio-controller > >> + - "#gpio-cells" > >> + - interrupts > >> + - interrupt-controller > >> + - "#interrupt-cells" > > > > "required:" goes after patternProperties. > > Will fix. > > > > >> + > >> +patternProperties: > >> + '-[0-9]+$': > > > > Same comment. > > Will fix. > Keep consistent quotes, use ' > > > > >> + type: object > >> + patternProperties: > >> + '-pins$': > >> + type: object > >> + description: | > >> + A pinctrl node should contain at least one subnode representing the > >> + pinctrl groups available on the machine. Each subnode will list the > >> + pins it needs, and how they should be configured, with regard to > >> + muxer configuration, system signal configuration, pin groups for > >> + vin/vout module, pin voltage, mux functions for output, mux functions > >> + for output enable, mux functions for input. > >> + > >> + properties: > >> + pinmux: > >> + description: | > >> + The list of GPIOs and their mux settings that properties in the > >> + node apply to. This should be set using the GPIOMUX macro. > >> + $ref: "/schemas/pinctrl/pinmux-node.yaml#/properties/pinmux" > >> + > >> + bias-disable: true > >> + > >> + bias-pull-up: > >> + type: boolean > >> + > >> + bias-pull-down: > >> + type: boolean > >> + > >> + drive-strength: > >> + enum: [ 2, 4, 8, 12 ] > >> + > >> + input-enable: true > >> + > >> + input-disable: true > >> + > >> + input-schmitt-enable: true > >> + > >> + input-schmitt-disable: true > >> + > >> + slew-rate: > >> + maximum: 1 > >> + > >> + additionalProperties: false > >> + > >> + additionalProperties: false > >> + > >> +additionalProperties: false > >> + > >> +examples: > >> + - | > >> + #include > >> + #include > >> + #include > >> + > >> + soc { > >> + #address-cells = <2>; > >> + #size-cells = <2>; Again these two lines can be dropped.. > > > > Same comment. > > Will fix. > Use 4 spaces for example indentation. > > > > >> + > >> + gpioa: gpio@17020000 { > >> + compatible = "starfive,jh7110-aon-pinctrl"; > >> + reg = <0x0 0x17020000 0x0 0x10000>; ..if you just change this to reg = <0x17020000 0x10000>; > >> + reg-names = "control"; > >> + resets = <&aoncrg_rst JH7110_AONRST_AON_IOMUX>; > >> + interrupts = <85>; > >> + interrupt-controller; > >> + #interrupt-cells = <2>; > >> + #gpio-cells = <2>; > >> + gpio-controller; > >> + }; > >> + }; > >> + > >> +... > > > > Best regards, > Jianlong Huang > >