From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68A28C63777 for ; Tue, 17 Nov 2020 07:34:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F3FA1221FD for ; Tue, 17 Nov 2020 07:34:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="FkJC1Qkz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726466AbgKQHeU (ORCPT ); Tue, 17 Nov 2020 02:34:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725978AbgKQHeU (ORCPT ); Tue, 17 Nov 2020 02:34:20 -0500 Received: from mail-il1-x141.google.com (mail-il1-x141.google.com [IPv6:2607:f8b0:4864:20::141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC7B6C0617A6 for ; Mon, 16 Nov 2020 23:34:19 -0800 (PST) Received: by mail-il1-x141.google.com with SMTP id l12so17728941ilo.1 for ; Mon, 16 Nov 2020 23:34:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=6HDQ36IQmVwckUFR1jBquv3GATc8YP+i067nuhtqXMU=; b=FkJC1QkzBGq1xiw3ZYZUvrgU3D/qhzlZFl95blKrpdFb0mMjRtHTGcsKULzeSqxcLD TcJtuOPAQKUv0SRgMRAb2Z390dosWlnmIoZX2RRjoNzGmW3ofFHJCaJ9FOP1FI+nBpb+ 9dJ7L2uxkDZN8uJKmzLsnnFBlw4TCwwcwwkmk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=6HDQ36IQmVwckUFR1jBquv3GATc8YP+i067nuhtqXMU=; b=mexdKoeoQGRB+NdlG0VD3OHKNtQLUDvSaIVxlhSnZQqU/GHgQiQhQ0cG20LnCkym/B ZQlH+m3YY6Lj4bler8S09FefCXx5lXEm3PQVeJolR2CfEu+UVzuIuy/SI6SUbyjWRsMG 0SQYiFTA1pAye0evnZ+R4x1b5WpcqLAWkSAv2Kugqxn4C6skXRgaoCVhQ0C2/EHM3/7x FyYGkN76rBg2zK0sN22a7xK9NwnemYvzhkHTFVAjSL+74hUgX/gE2tYrhouGcWwjXYIL 0R4xQlO1H4B8omKm3FHptcHl1wm7gCSLYfeySzbuTufW60fgeI4l/ZiAfiMhp9QvNiai SoxQ== X-Gm-Message-State: AOAM532R1fYtQ6Z01n4en6/3FeFjrm69qzyoFzqYx5iwY/UystGY4RU/ Dxt5hEUXygioKwvycepIjoeyr7uNwtN7NN2+DiDZEg== X-Google-Smtp-Source: ABdhPJyhldjhwb1mLZC438M7LVHuxra/t1HCNICdkNriJ7L2AIbB4FEpFKlINz1Bn9qS+8p5dsClFMJU1CAg1+wejAE= X-Received: by 2002:a92:dd87:: with SMTP id g7mr12363454iln.102.1605598458861; Mon, 16 Nov 2020 23:34:18 -0800 (PST) MIME-Version: 1.0 References: <1596855231-5782-1-git-send-email-yongqiang.niu@mediatek.com> <1596855231-5782-5-git-send-email-yongqiang.niu@mediatek.com> In-Reply-To: <1596855231-5782-5-git-send-email-yongqiang.niu@mediatek.com> From: Hsin-Yi Wang Date: Tue, 17 Nov 2020 15:33:53 +0800 Message-ID: Subject: Re: [RESEND v7, PATCH 4/7] mtk-mmsys: add mt8183 mmsys support To: Yongqiang Niu Cc: CK Hu , Philipp Zabel , Rob Herring , Matthias Brugger , Mark Rutland , Devicetree List , David Airlie , lkml , dri-devel , "moderated list:ARM/Mediatek SoC support" , Daniel Vetter , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 8, 2020 at 2:53 AM Yongqiang Niu wrote: > > add mt8183 mmsys support > > Signed-off-by: Yongqiang Niu > --- > drivers/soc/mediatek/mmsys/Makefile | 1 + > drivers/soc/mediatek/mmsys/mt8183-mmsys.c | 154 ++++++++++++++++++++++++++++++ > drivers/soc/mediatek/mtk-mmsys.c | 1 + > 3 files changed, 156 insertions(+) > create mode 100644 drivers/soc/mediatek/mmsys/mt8183-mmsys.c > > diff --git a/drivers/soc/mediatek/mmsys/Makefile b/drivers/soc/mediatek/mmsys/Makefile > index 33b0dab..62cfedf 100644 > --- a/drivers/soc/mediatek/mmsys/Makefile > +++ b/drivers/soc/mediatek/mmsys/Makefile > @@ -1,2 +1,3 @@ > # SPDX-License-Identifier: GPL-2.0-only > obj-y += mt2701-mmsys.o > +obj-y += mt8183-mmsys.o > diff --git a/drivers/soc/mediatek/mmsys/mt8183-mmsys.c b/drivers/soc/mediatek/mmsys/mt8183-mmsys.c > new file mode 100644 > index 0000000..e5170b5 > --- /dev/null > +++ b/drivers/soc/mediatek/mmsys/mt8183-mmsys.c > @@ -0,0 +1,154 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// > +// Copyright (c) 2020 MediaTek Inc. > + > +#include > +#include > +#include > +#include > +#include > + > +#define DISP_OVL0_MOUT_EN 0xf00 > +#define DISP_OVL0_2L_MOUT_EN 0xf04 > +#define DISP_OVL1_2L_MOUT_EN 0xf08 > +#define DISP_DITHER0_MOUT_EN 0xf0c > +#define DISP_PATH0_SEL_IN 0xf24 > +#define DISP_DSI0_SEL_IN 0xf2c > +#define DISP_DPI0_SEL_IN 0xf30 > +#define DISP_RDMA0_SOUT_SEL_IN 0xf50 > +#define DISP_RDMA1_SOUT_SEL_IN 0xf54 > + > +#define OVL0_MOUT_EN_OVL0_2L BIT(4) > +#define OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0) > +#define OVL1_2L_MOUT_EN_RDMA1 BIT(4) > +#define DITHER0_MOUT_IN_DSI0 BIT(0) > +#define DISP_PATH0_SEL_IN_OVL0_2L 0x1 > +#define DSI0_SEL_IN_RDMA0 0x1 > +#define DSI0_SEL_IN_RDMA1 0x3 > +#define DPI0_SEL_IN_RDMA0 0x1 > +#define DPI0_SEL_IN_RDMA1 0x2 > +#define RDMA0_SOUT_COLOR0 0x1 > +#define RDMA1_SOUT_DSI0 0x1 > + > +struct mmsys_path_sel { > + enum mtk_ddp_comp_id cur; > + enum mtk_ddp_comp_id next; > + u32 addr; > + u32 val; > +}; > + > +static struct mmsys_path_sel mmsys_mout_en[] = { > + { > + DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0, > + DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_OVL0_2L, > + }, > + { > + DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0, > + DISP_OVL0_2L_MOUT_EN, OVL0_2L_MOUT_EN_DISP_PATH0, > + }, > + { > + DDP_COMPONENT_OVL_2L1, DDP_COMPONENT_RDMA1, > + DISP_OVL1_2L_MOUT_EN, OVL1_2L_MOUT_EN_RDMA1, > + }, > + { > + DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0, > + DISP_DITHER0_MOUT_EN, DITHER0_MOUT_IN_DSI0, > + }, > +}; > + > +static struct mmsys_path_sel mmsys_sel_in[] = { > + { > + DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0, > + DISP_PATH0_SEL_IN, DISP_PATH0_SEL_IN_OVL0_2L, > + }, > + { > + DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0, > + DISP_DPI0_SEL_IN, DPI0_SEL_IN_RDMA1, > + }, > +}; > + > +static struct mmsys_path_sel mmsys_sout_sel[] = { > + { > + DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0, > + DISP_RDMA0_SOUT_SEL_IN, RDMA0_SOUT_COLOR0, > + }, > +}; > + > +static unsigned int mtk_mmsys_ddp_mout_en(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + u32 i; > + struct mmsys_path_sel *path; > + > + for (i = 0; i < ARRAY_SIZE(mmsys_mout_en); i++) { > + path = &mmsys_mout_en[i]; > + if (cur == path->cur && next == path->next) { > + *addr = path->addr; > + return path->val; > + } > + } > + > + return 0; > +} > + > +static unsigned int mtk_mmsys_ddp_sel_in(enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next, > + unsigned int *addr) > +{ > + u32 i; > + struct mmsys_path_sel *path; > + > + for (i = 0; i < ARRAY_SIZE(mmsys_sel_in); i++) { > + path = &mmsys_sel_in[i]; > + if (cur == path->cur && next == path->next) { > + *addr = path->addr; > + return path->val; > + } > + } > + > + return 0; > +} > + > +static void mtk_mmsys_ddp_sout_sel(void __iomem *config_regs, > + enum mtk_ddp_comp_id cur, > + enum mtk_ddp_comp_id next) > +{ > + u32 i; > + u32 val = 0; This variable is unused. > + u32 addr = 0; > + struct mmsys_path_sel *path; > + > + for (i = 0; i < ARRAY_SIZE(mmsys_sout_sel); i++) { > + path = &mmsys_sout_sel[i]; > + if (cur == path->cur && next == path->next) { > + addr = path->addr; > + writel_relaxed(path->val, config_regs + addr); > + return; > + } > + } > +} > + > +static struct mtk_mmsys_conn_funcs mmsys_funcs = { > + .mout_en = mtk_mmsys_ddp_mout_en, > + .sel_in = mtk_mmsys_ddp_sel_in, > + .sout_sel = mtk_mmsys_ddp_sout_sel, > +}; > + > +static int mmsys_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + > + mtk_mmsys_register_conn_funcs(dev->parent, &mmsys_funcs); > + > + return 0; > +} > + > +static struct platform_driver mmsys_drv = { > + .probe = mmsys_probe, > + .driver = { > + .name = "mt8183-mmsys", > + }, > +}; > + > +builtin_platform_driver(mmsys_drv); > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index 605b992..6a451ac 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -47,6 +47,7 @@ struct mtk_mmsys_private_data { > > static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { > .clk_driver = "clk-mt8183-mm", > + .mmsys_driver = "mt8183-mmsys", > }; > > void mtk_mmsys_ddp_connect(struct device *dev,