* [PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)
@ 2021-07-20 5:51 Yongqiang Niu
2021-07-20 5:51 ` Yongqiang Niu
0 siblings, 1 reply; 3+ messages in thread
From: Yongqiang Niu @ 2021-07-20 5:51 UTC (permalink / raw)
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
Change since v2:
- add fixes tag and modify commit message
Yongqiang Niu (1):
Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common()
function)
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
1 file changed, 2 insertions(+)
--
1.8.1.1.dirty
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)
2021-07-20 5:51 [PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function) Yongqiang Niu
@ 2021-07-20 5:51 ` Yongqiang Niu
2021-07-20 6:02 ` Hsin-Yi Wang
0 siblings, 1 reply; 3+ messages in thread
From: Yongqiang Niu @ 2021-07-20 5:51 UTC (permalink / raw)
To: Chun-Kuang Hu
Cc: Rob Herring, Matthias Brugger, Philipp Zabel, David Airlie,
Daniel Vetter, Jassi Brar, Yongqiang Niu, Fabien Parent,
Dennis YC Hsieh, devicetree, linux-arm-kernel, linux-mediatek,
linux-kernel, dri-devel, Project_Global_Chrome_Upstream_Group,
Hsin-Yi Wang
dither 6 setting is missed in a6b7c98afdca
bit 1 is lfsr_en( "Enables LFSR-type dithering"), need enable
bit 2 is rdither_en(Enables running order dithering), need disable
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index 99cbf44..7dd8e05 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -26,6 +26,7 @@
#define DISP_OD_CFG 0x0020
#define DISP_OD_SIZE 0x0030
#define DISP_DITHER_5 0x0114
+#define DISP_DITHER_6 0x0118
#define DISP_DITHER_7 0x011c
#define DISP_DITHER_15 0x013c
#define DISP_DITHER_16 0x0140
@@ -135,6 +136,7 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
if (bpc >= MTK_MIN_BPC) {
mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
+ mtk_ddp_write(cmdq_pkt, 0x3002, cmdq_reg, regs, DISP_DITHER_6);
mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
mtk_ddp_write(cmdq_pkt,
DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
--
1.8.1.1.dirty
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function)
2021-07-20 5:51 ` Yongqiang Niu
@ 2021-07-20 6:02 ` Hsin-Yi Wang
0 siblings, 0 replies; 3+ messages in thread
From: Hsin-Yi Wang @ 2021-07-20 6:02 UTC (permalink / raw)
To: Yongqiang Niu
Cc: Chun-Kuang Hu, Rob Herring, Matthias Brugger, Philipp Zabel,
David Airlie, Daniel Vetter, Jassi Brar, Fabien Parent,
Dennis YC Hsieh, Devicetree List,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
moderated list:ARM/Mediatek SoC support, lkml, dri-devel,
Project_Global_Chrome_Upstream_Group
On Tue, Jul 20, 2021 at 1:51 PM Yongqiang Niu
<yongqiang.niu@mediatek.com> wrote:
>
> dither 6 setting is missed in a6b7c98afdca
> bit 1 is lfsr_en( "Enables LFSR-type dithering"), need enable
> bit 2 is rdither_en(Enables running order dithering), need disable
>
Fixes tag should be here, and the title of this patch should be the
same as v2: drm/mediatek: add dither 6 setting
> Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> index 99cbf44..7dd8e05 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
> @@ -26,6 +26,7 @@
> #define DISP_OD_CFG 0x0020
> #define DISP_OD_SIZE 0x0030
> #define DISP_DITHER_5 0x0114
> +#define DISP_DITHER_6 0x0118
> #define DISP_DITHER_7 0x011c
> #define DISP_DITHER_15 0x013c
> #define DISP_DITHER_16 0x0140
> @@ -135,6 +136,7 @@ void mtk_dither_set_common(void __iomem *regs, struct cmdq_client_reg *cmdq_reg,
>
> if (bpc >= MTK_MIN_BPC) {
> mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_5);
> + mtk_ddp_write(cmdq_pkt, 0x3002, cmdq_reg, regs, DISP_DITHER_6);
> mtk_ddp_write(cmdq_pkt, 0, cmdq_reg, regs, DISP_DITHER_7);
> mtk_ddp_write(cmdq_pkt,
> DITHER_LSB_ERR_SHIFT_R(MTK_MAX_BPC - bpc) |
> --
> 1.8.1.1.dirty
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-07-20 5:51 [PATCH v3] Fixes: a6b7c98afdca(drm/mediatek: add mtk_dither_set_common() function) Yongqiang Niu
2021-07-20 5:51 ` Yongqiang Niu
2021-07-20 6:02 ` Hsin-Yi Wang
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