From: "Rafael J. Wysocki" <rafael@kernel.org>
To: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Peter Zijlstra <peterz@infradead.org>,
Andy Lutomirski <luto@kernel.org>, Peter H Anvin <hpa@zytor.com>,
Dave Hansen <dave.hansen@intel.com>,
Tony Luck <tony.luck@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Andi Kleen <ak@linux.intel.com>,
Kirill Shutemov <kirill.shutemov@linux.intel.com>,
Sean Christopherson <seanjc@google.com>,
Kuppuswamy Sathyanarayanan <knsathya@kernel.org>,
"the arch/x86 maintainers" <x86@kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"Rafael J . Wysocki" <rjw@rjwysocki.net>,
ACPI Devel Maling List <linux-acpi@vger.kernel.org>
Subject: Re: [PATCH v1 5/5] x86: Skip WBINVD instruction for VM guest
Date: Thu, 10 Jun 2021 15:00:10 +0200 [thread overview]
Message-ID: <CAJZ5v0gWPrL4VPds2jkMte_dymV8GyaarY3338OUkAGgTrTbEg@mail.gmail.com> (raw)
In-Reply-To: <20210609215047.1955866-6-sathyanarayanan.kuppuswamy@linux.intel.com>
On Wed, Jun 9, 2021 at 11:51 PM Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>
> VM guests that supports ACPI, use standard ACPI mechanisms to signal
> sleep state entry (including reboot) to the host. The ACPI
> specification mandates WBINVD on any sleep state entry with the
> expectation that the platform is only responsible for maintaining the
> state of memory over sleep states, not preserving dirty data in any
> CPU caches. ACPI cache flushing requirements pre-date the advent of
> virtualization. Given guest sleep state entry does not affect any
> host power rails it is not required to flush caches. The host is
> responsible for maintaining cache state over its own bare metal sleep
> state transitions that power-off the cache. A TDX guest, unlike a
> typical guest, will machine check if the CPU cache is powered off.
>
> Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
> Cc: linux-acpi@vger.kernel.org
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> ---
> arch/x86/include/asm/acenv.h | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/acenv.h b/arch/x86/include/asm/acenv.h
> index 9aff97f0de7f..d4162e94bee8 100644
> --- a/arch/x86/include/asm/acenv.h
> +++ b/arch/x86/include/asm/acenv.h
> @@ -10,10 +10,15 @@
> #define _ASM_X86_ACENV_H
>
> #include <asm/special_insns.h>
> +#include <asm/cpu.h>
>
> /* Asm macros */
>
> -#define ACPI_FLUSH_CPU_CACHE() wbinvd()
> +#define ACPI_FLUSH_CPU_CACHE() \
> +do { \
> + if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) \
> + wbinvd(); \
> +} while (0)
>
> int __acpi_acquire_global_lock(unsigned int *lock);
> int __acpi_release_global_lock(unsigned int *lock);
> --
> 2.25.1
>
prev parent reply other threads:[~2021-06-10 13:00 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-09 21:50 [PATCH v1 0/5] Add TDX Guest Support (boot fixes) Kuppuswamy Sathyanarayanan
2021-06-09 21:50 ` [PATCH v1 1/5] x86/boot: Add a trampoline for APs booting in 64-bit mode Kuppuswamy Sathyanarayanan
2021-06-09 21:50 ` [PATCH v1 2/5] x86/boot: Avoid #VE during boot for TDX platforms Kuppuswamy Sathyanarayanan
2021-06-09 21:50 ` [PATCH v1 3/5] x86/topology: Disable CPU online/offline control for TDX guest Kuppuswamy Sathyanarayanan
2021-06-09 21:50 ` [PATCH v1 4/5] x86/tdx: Forcefully disable legacy PIC for TDX guests Kuppuswamy Sathyanarayanan
2021-06-09 21:50 ` [PATCH v1 5/5] x86: Skip WBINVD instruction for VM guest Kuppuswamy Sathyanarayanan
2021-06-10 13:00 ` Rafael J. Wysocki [this message]
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