From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17C09C10F03 for ; Wed, 13 Mar 2019 23:18:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BFC9821019 for ; Wed, 13 Mar 2019 23:18:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1552519103; bh=i4OY5RNQjz/WlMtn/mb8Tlt185YWFZ86d5FdLQnkXFI=; h=References:In-Reply-To:From:Date:Subject:To:Cc:List-ID:From; b=N4HlcAif1k1rZseSnVR8QJLT/BET8dcel9TCqYmrmTqQ+LyyKQo6lxZEfrGphdh9E KAp+8UGKfiDNWrKz4Es+R8onIzaZWz/9lnfK1UpaVAxfL6lxj9CjTyusCzFY1FgDTi +UJunCPlsikXez+zGCe2wQcYs3eYvLY/J3apXyG0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726971AbfCMXSW (ORCPT ); Wed, 13 Mar 2019 19:18:22 -0400 Received: from mail-oi1-f193.google.com ([209.85.167.193]:33054 "EHLO mail-oi1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726183AbfCMXSW (ORCPT ); Wed, 13 Mar 2019 19:18:22 -0400 Received: by mail-oi1-f193.google.com with SMTP id z14so2922147oid.0; Wed, 13 Mar 2019 16:18:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=f6SvYlx/F883vR+Z7/H0ZrIgNORsq0y2rNgyJLV3sLU=; b=CW8dzJftdzDU814vhdf9yb3fWum2Ar7shEWk4osv7vEPKj4jt/b5yp5K113o6rJR0p Rc2KxJHFeosh7bG5b4Xf+EYo9LZs7AgJUKbhVJAUbUksWE4AtY6QndKgTt4NTcYkFyfm +3Zog4AwbqtEhPGcog6+l5nBFIqR2Gj6OGWzPFZ9aq86xfVChNe0u8DLsx5xFiVCRAqY QqDugmJtBu95MOhcFyszRLHJFYGZf44t33OUaxMvZD9T+QpXbb8/Xy0XV42FeeBhxR0d 2UfrPF0xa01LyJhdExz0jfMe8zDsK8UYmMNeHv8x6eWuSZUBcSGtP9v1Ts+KPm9ZgatB PMxA== X-Gm-Message-State: APjAAAWTngXNoE1w1FCHc5Vz362eKFiGEaDV2pfmfjGlTpJ7jEKtDE4l W7/7sOnPrWc/IquRTC3Uxq3fO4+UMqFX3ERifUSNPA== X-Google-Smtp-Source: APXvYqzCExDtKDvNArYMQv0H+xCit2nQ8ryBNUAdxmAXIjCr+K0NST0v6WEB+YFkrY84UVuilo3iRuHLwl9wnaowSB8= X-Received: by 2002:aca:88b:: with SMTP id 133mr375365oii.95.1552519100857; Wed, 13 Mar 2019 16:18:20 -0700 (PDT) MIME-Version: 1.0 References: <20190311205606.11228-1-keith.busch@intel.com> <20190311205606.11228-7-keith.busch@intel.com> In-Reply-To: <20190311205606.11228-7-keith.busch@intel.com> From: "Rafael J. Wysocki" Date: Thu, 14 Mar 2019 00:18:09 +0100 Message-ID: Subject: Re: [PATCHv8 06/10] node: Add memory-side caching attributes To: Keith Busch Cc: Linux Kernel Mailing List , ACPI Devel Maling List , Linux Memory Management List , Linux API , Greg Kroah-Hartman , Rafael Wysocki , Dave Hansen , Dan Williams , Jonathan Cameron , Brice Goglin Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 11, 2019 at 9:55 PM Keith Busch wrote: > > System memory may have caches to help improve access speed to frequently > requested address ranges. While the system provided cache is transparent > to the software accessing these memory ranges, applications can optimize > their own access based on cache attributes. > > Provide a new API for the kernel to register these memory-side caches > under the memory node that provides it. > > The new sysfs representation is modeled from the existing cpu cacheinfo > attributes, as seen from /sys/devices/system/cpu//cache/. Unlike CPU > cacheinfo though, the node cache level is reported from the view of the > memory. A higher level number is nearer to the CPU, while lower levels > are closer to the last level memory. > > The exported attributes are the cache size, the line size, associativity > indexing, and write back policy, and add the attributes for the system > memory caches to sysfs stable documentation. > > Signed-off-by: Keith Busch Reviewed-by: Rafael J. Wysocki > --- > Documentation/ABI/stable/sysfs-devices-node | 34 +++++++ > drivers/base/node.c | 151 ++++++++++++++++++++++++++++ > include/linux/node.h | 39 +++++++ > 3 files changed, 224 insertions(+) > > diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node > index 735a40a3f9b2..f7ce68fbd4b9 100644 > --- a/Documentation/ABI/stable/sysfs-devices-node > +++ b/Documentation/ABI/stable/sysfs-devices-node > @@ -142,3 +142,37 @@ Contact: Keith Busch > Description: > This node's write latency in nanoseconds when access > from nodes found in this class's linked initiators. > + > +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/ > +Date: December 2018 > +Contact: Keith Busch > +Description: > + The directory containing attributes for the memory-side cache > + level 'Y'. > + > +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/indexing > +Date: December 2018 > +Contact: Keith Busch > +Description: > + The caches associativity indexing: 0 for direct mapped, > + non-zero if indexed. > + > +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/line_size > +Date: December 2018 > +Contact: Keith Busch > +Description: > + The number of bytes accessed from the next cache level on a > + cache miss. > + > +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/size > +Date: December 2018 > +Contact: Keith Busch > +Description: > + The size of this memory side cache in bytes. > + > +What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/write_policy > +Date: December 2018 > +Contact: Keith Busch > +Description: > + The cache write policy: 0 for write-back, 1 for write-through, > + other or unknown. > diff --git a/drivers/base/node.c b/drivers/base/node.c > index 2de546a040a5..8598fcbd2a17 100644 > --- a/drivers/base/node.c > +++ b/drivers/base/node.c > @@ -205,6 +205,155 @@ void node_set_perf_attrs(unsigned int nid, struct node_hmem_attrs *hmem_attrs, > } > } > } > + > +/** > + * struct node_cache_info - Internal tracking for memory node caches > + * @dev: Device represeting the cache level > + * @node: List element for tracking in the node > + * @cache_attrs:Attributes for this cache level > + */ > +struct node_cache_info { > + struct device dev; > + struct list_head node; > + struct node_cache_attrs cache_attrs; > +}; > +#define to_cache_info(device) container_of(device, struct node_cache_info, dev) > + > +#define CACHE_ATTR(name, fmt) \ > +static ssize_t name##_show(struct device *dev, \ > + struct device_attribute *attr, \ > + char *buf) \ > +{ \ > + return sprintf(buf, fmt "\n", to_cache_info(dev)->cache_attrs.name);\ > +} \ > +DEVICE_ATTR_RO(name); > + > +CACHE_ATTR(size, "%llu") > +CACHE_ATTR(line_size, "%u") > +CACHE_ATTR(indexing, "%u") > +CACHE_ATTR(write_policy, "%u") > + > +static struct attribute *cache_attrs[] = { > + &dev_attr_indexing.attr, > + &dev_attr_size.attr, > + &dev_attr_line_size.attr, > + &dev_attr_write_policy.attr, > + NULL, > +}; > +ATTRIBUTE_GROUPS(cache); > + > +static void node_cache_release(struct device *dev) > +{ > + kfree(dev); > +} > + > +static void node_cacheinfo_release(struct device *dev) > +{ > + struct node_cache_info *info = to_cache_info(dev); > + kfree(info); > +} > + > +static void node_init_cache_dev(struct node *node) > +{ > + struct device *dev; > + > + dev = kzalloc(sizeof(*dev), GFP_KERNEL); > + if (!dev) > + return; > + > + dev->parent = &node->dev; > + dev->release = node_cache_release; > + if (dev_set_name(dev, "memory_side_cache")) > + goto free_dev; > + > + if (device_register(dev)) > + goto free_name; > + > + pm_runtime_no_callbacks(dev); > + node->cache_dev = dev; > + return; > +free_name: > + kfree_const(dev->kobj.name); > +free_dev: > + kfree(dev); > +} > + > +/** > + * node_add_cache() - add cache attribute to a memory node > + * @nid: Node identifier that has new cache attributes > + * @cache_attrs: Attributes for the cache being added > + */ > +void node_add_cache(unsigned int nid, struct node_cache_attrs *cache_attrs) > +{ > + struct node_cache_info *info; > + struct device *dev; > + struct node *node; > + > + if (!node_online(nid) || !node_devices[nid]) > + return; > + > + node = node_devices[nid]; > + list_for_each_entry(info, &node->cache_attrs, node) { > + if (info->cache_attrs.level == cache_attrs->level) { > + dev_warn(&node->dev, > + "attempt to add duplicate cache level:%d\n", > + cache_attrs->level); > + return; > + } > + } > + > + if (!node->cache_dev) > + node_init_cache_dev(node); > + if (!node->cache_dev) > + return; > + > + info = kzalloc(sizeof(*info), GFP_KERNEL); > + if (!info) > + return; > + > + dev = &info->dev; > + dev->parent = node->cache_dev; > + dev->release = node_cacheinfo_release; > + dev->groups = cache_groups; > + if (dev_set_name(dev, "index%d", cache_attrs->level)) > + goto free_cache; > + > + info->cache_attrs = *cache_attrs; > + if (device_register(dev)) { > + dev_warn(&node->dev, "failed to add cache level:%d\n", > + cache_attrs->level); > + goto free_name; > + } > + pm_runtime_no_callbacks(dev); > + list_add_tail(&info->node, &node->cache_attrs); > + return; > +free_name: > + kfree_const(dev->kobj.name); > +free_cache: > + kfree(info); > +} > + > +static void node_remove_caches(struct node *node) > +{ > + struct node_cache_info *info, *next; > + > + if (!node->cache_dev) > + return; > + > + list_for_each_entry_safe(info, next, &node->cache_attrs, node) { > + list_del(&info->node); > + device_unregister(&info->dev); > + } > + device_unregister(node->cache_dev); > +} > + > +static void node_init_caches(unsigned int nid) > +{ > + INIT_LIST_HEAD(&node_devices[nid]->cache_attrs); > +} > +#else > +static void node_init_caches(unsigned int nid) { } > +static void node_remove_caches(struct node *node) { } > #endif > > #define K(x) ((x) << (PAGE_SHIFT - 10)) > @@ -489,6 +638,7 @@ void unregister_node(struct node *node) > { > hugetlb_unregister_node(node); /* no-op, if memoryless node */ > node_remove_accesses(node); > + node_remove_caches(node); > device_unregister(&node->dev); > } > > @@ -781,6 +931,7 @@ int __register_one_node(int nid) > INIT_LIST_HEAD(&node_devices[nid]->access_list); > /* initialize work queue for memory hot plug */ > init_node_hugetlb_work(nid); > + node_init_caches(nid); > > return error; > } > diff --git a/include/linux/node.h b/include/linux/node.h > index 4139d728f8b3..1a557c589ecb 100644 > --- a/include/linux/node.h > +++ b/include/linux/node.h > @@ -35,10 +35,45 @@ struct node_hmem_attrs { > unsigned int write_latency; > }; > > +enum cache_indexing { > + NODE_CACHE_DIRECT_MAP, > + NODE_CACHE_INDEXED, > + NODE_CACHE_OTHER, > +}; > + > +enum cache_write_policy { > + NODE_CACHE_WRITE_BACK, > + NODE_CACHE_WRITE_THROUGH, > + NODE_CACHE_WRITE_OTHER, > +}; > + > +/** > + * struct node_cache_attrs - system memory caching attributes > + * > + * @indexing: The ways memory blocks may be placed in cache > + * @write_policy: Write back or write through policy > + * @size: Total size of cache in bytes > + * @line_size: Number of bytes fetched on a cache miss > + * @level: The cache hierarchy level > + */ > +struct node_cache_attrs { > + enum cache_indexing indexing; > + enum cache_write_policy write_policy; > + u64 size; > + u16 line_size; > + u8 level; > +}; > + > #ifdef CONFIG_HMEM_REPORTING > +void node_add_cache(unsigned int nid, struct node_cache_attrs *cache_attrs); > void node_set_perf_attrs(unsigned int nid, struct node_hmem_attrs *hmem_attrs, > unsigned access); > #else > +static inline void node_add_cache(unsigned int nid, > + struct node_cache_attrs *cache_attrs) > +{ > +} > + > static inline void node_set_perf_attrs(unsigned int nid, > struct node_hmem_attrs *hmem_attrs, > unsigned access) > @@ -53,6 +88,10 @@ struct node { > #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HUGETLBFS) > struct work_struct node_work; > #endif > +#ifdef CONFIG_HMEM_REPORTING > + struct list_head cache_attrs; > + struct device *cache_dev; > +#endif > }; > > struct memory_block; > -- > 2.14.4 >