* [PATCH 1/2] ARM: uniphier: dts: add more clocks to Denali NAND controller node
@ 2018-07-20 8:50 Masahiro Yamada
2018-07-20 8:50 ` [PATCH 2/2] arm64: " Masahiro Yamada
2018-08-28 14:26 ` [PATCH 1/2] ARM: " Masahiro Yamada
0 siblings, 2 replies; 3+ messages in thread
From: Masahiro Yamada @ 2018-07-20 8:50 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Boris Brezillon, Rob Herring, Masami Hiramatsu, Jassi Brar,
Masahiro Yamada, devicetree, linux-kernel, Mark Rutland
Catch up with the new binding of the Denali IP where three clocks,
"nand", "nand_x", "ecc" are required.
For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they
are both 200MHz.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 3 ++-
arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++-
arch/arm/boot/dts/uniphier-pro5.dtsi | 3 ++-
arch/arm/boot/dts/uniphier-pxs2.dtsi | 3 ++-
arch/arm/boot/dts/uniphier-sld8.dtsi | 3 ++-
5 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi
index 37950ad..2a17066 100644
--- a/arch/arm/boot/dts/uniphier-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ld4.dtsi
@@ -347,7 +347,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
index 49539f0..da88ccc 100644
--- a/arch/arm/boot/dts/uniphier-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
@@ -394,7 +394,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
index 06c2cef..40a84f2 100644
--- a/arch/arm/boot/dts/uniphier-pro5.dtsi
+++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
@@ -439,7 +439,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
index 641d961..1903752 100644
--- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
@@ -528,7 +528,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi
index e9b9b4f..dc723bf 100644
--- a/arch/arm/boot/dts/uniphier-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-sld8.dtsi
@@ -351,7 +351,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] arm64: uniphier: dts: add more clocks to Denali NAND controller node
2018-07-20 8:50 [PATCH 1/2] ARM: uniphier: dts: add more clocks to Denali NAND controller node Masahiro Yamada
@ 2018-07-20 8:50 ` Masahiro Yamada
2018-08-28 14:26 ` [PATCH 1/2] ARM: " Masahiro Yamada
1 sibling, 0 replies; 3+ messages in thread
From: Masahiro Yamada @ 2018-07-20 8:50 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Boris Brezillon, Rob Herring, Masami Hiramatsu, Jassi Brar,
Masahiro Yamada, devicetree, linux-kernel, Will Deacon,
Mark Rutland, Catalin Marinas
Catch up with the new binding of the Denali IP where three clocks,
"nand", "nand_x", "ecc" are required.
For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they
are both 200MHz.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 3 ++-
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 3 ++-
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index d63b56e..5640dac 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -571,7 +571,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 0298bd0..a8964c0 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -626,7 +626,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index 2a4cf42..fd2bcd4 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -455,7 +455,8 @@
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- clocks = <&sys_clk 2>;
+ clock-names = "nand", "nand_x", "ecc";
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
resets = <&sys_rst 2>;
};
};
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] ARM: uniphier: dts: add more clocks to Denali NAND controller node
2018-07-20 8:50 [PATCH 1/2] ARM: uniphier: dts: add more clocks to Denali NAND controller node Masahiro Yamada
2018-07-20 8:50 ` [PATCH 2/2] arm64: " Masahiro Yamada
@ 2018-08-28 14:26 ` Masahiro Yamada
1 sibling, 0 replies; 3+ messages in thread
From: Masahiro Yamada @ 2018-08-28 14:26 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Boris Brezillon, Rob Herring, Masami Hiramatsu, Jassi Brar,
Masahiro Yamada, DTML, Linux Kernel Mailing List, Mark Rutland
2018-07-20 17:50 GMT+09:00 Masahiro Yamada <yamada.masahiro@socionext.com>:
> Catch up with the new binding of the Denali IP where three clocks,
> "nand", "nand_x", "ecc" are required.
>
> For UniPhier SoCs, the "nand_x" and "ecc" are tied up because they
> are both 200MHz.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
Both applied.
> arch/arm/boot/dts/uniphier-ld4.dtsi | 3 ++-
> arch/arm/boot/dts/uniphier-pro4.dtsi | 3 ++-
> arch/arm/boot/dts/uniphier-pro5.dtsi | 3 ++-
> arch/arm/boot/dts/uniphier-pxs2.dtsi | 3 ++-
> arch/arm/boot/dts/uniphier-sld8.dtsi | 3 ++-
> 5 files changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi
> index 37950ad..2a17066 100644
> --- a/arch/arm/boot/dts/uniphier-ld4.dtsi
> +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi
> @@ -347,7 +347,8 @@
> interrupts = <0 65 4>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_nand2cs>;
> - clocks = <&sys_clk 2>;
> + clock-names = "nand", "nand_x", "ecc";
> + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
> resets = <&sys_rst 2>;
> };
> };
> diff --git a/arch/arm/boot/dts/uniphier-pro4.dtsi b/arch/arm/boot/dts/uniphier-pro4.dtsi
> index 49539f0..da88ccc 100644
> --- a/arch/arm/boot/dts/uniphier-pro4.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pro4.dtsi
> @@ -394,7 +394,8 @@
> interrupts = <0 65 4>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_nand>;
> - clocks = <&sys_clk 2>;
> + clock-names = "nand", "nand_x", "ecc";
> + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
> resets = <&sys_rst 2>;
> };
> };
> diff --git a/arch/arm/boot/dts/uniphier-pro5.dtsi b/arch/arm/boot/dts/uniphier-pro5.dtsi
> index 06c2cef..40a84f2 100644
> --- a/arch/arm/boot/dts/uniphier-pro5.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pro5.dtsi
> @@ -439,7 +439,8 @@
> interrupts = <0 65 4>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_nand2cs>;
> - clocks = <&sys_clk 2>;
> + clock-names = "nand", "nand_x", "ecc";
> + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
> resets = <&sys_rst 2>;
> };
> };
> diff --git a/arch/arm/boot/dts/uniphier-pxs2.dtsi b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> index 641d961..1903752 100644
> --- a/arch/arm/boot/dts/uniphier-pxs2.dtsi
> +++ b/arch/arm/boot/dts/uniphier-pxs2.dtsi
> @@ -528,7 +528,8 @@
> interrupts = <0 65 4>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_nand2cs>;
> - clocks = <&sys_clk 2>;
> + clock-names = "nand", "nand_x", "ecc";
> + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
> resets = <&sys_rst 2>;
> };
> };
> diff --git a/arch/arm/boot/dts/uniphier-sld8.dtsi b/arch/arm/boot/dts/uniphier-sld8.dtsi
> index e9b9b4f..dc723bf 100644
> --- a/arch/arm/boot/dts/uniphier-sld8.dtsi
> +++ b/arch/arm/boot/dts/uniphier-sld8.dtsi
> @@ -351,7 +351,8 @@
> interrupts = <0 65 4>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_nand2cs>;
> - clocks = <&sys_clk 2>;
> + clock-names = "nand", "nand_x", "ecc";
> + clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
> resets = <&sys_rst 2>;
> };
> };
> --
> 2.7.4
>
> --
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--
Best Regards
Masahiro Yamada
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-07-20 8:50 [PATCH 1/2] ARM: uniphier: dts: add more clocks to Denali NAND controller node Masahiro Yamada
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