From: Arnd Bergmann <arnd@arndb.de>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Nathan Chancellor <natechancellor@gmail.com>,
Nick Desaulniers <ndesaulniers@google.com>,
Michael Ellerman <mpe@ellerman.id.au>,
christophe leroy <christophe.leroy@c-s.fr>,
kbuild test robot <lkp@intel.com>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
clang-built-linux <clang-built-linux@googlegroups.com>
Subject: Re: [PATCH] powerpc: workaround clang codegen bug in dcbz
Date: Tue, 30 Jul 2019 20:24:14 +0200 [thread overview]
Message-ID: <CAK8P3a0_ovcX9tOo1UQ3_1UmM=+A2X=yErw27i2pHOj4XD40-A@mail.gmail.com> (raw)
In-Reply-To: <20190730161637.GP31406@gate.crashing.org>
On Tue, Jul 30, 2019 at 6:16 PM Segher Boessenkool
<segher@kernel.crashing.org> wrote:
>
> On Tue, Jul 30, 2019 at 04:30:29PM +0200, Arnd Bergmann wrote:
> > On Tue, Jul 30, 2019 at 3:49 PM Segher Boessenkool
> > <segher@kernel.crashing.org> wrote:
> > >
> > > On Tue, Jul 30, 2019 at 09:34:28AM +0200, Arnd Bergmann wrote:
> > > > Upon a second look, I think the issue is that the "Z" is an input argument
> > > > when it should be an output. clang decides that it can make a copy of the
> > > > input and pass that into the inline asm. This is not the most efficient
> > > > way, but it seems entirely correct according to the constraints.
> > >
> > > Most dcb* (and all icb*) do not change the memory pointed to. The
> > > memory is an input here, logically as well, and that is obvious.
> >
> > Ah, right. I had only thought of dcbz here, but you are right that using
> > an output makes little sense for the others.
> >
> > readl() is another example where powerpc currently uses "Z" for an
> > input, which illustrates this even better.
>
> in_le32 and friends? Yeah, huh. If LLVM copies that to the stack as
> well, its (not byte reversing) read will be atomic just fine, so things
> will still work correctly.
byteorder is fine, the problem I was thinking of is when moving the load/store
instructions around the barriers that synchronize with DMA, or turning
them into different-size accesses. Changing two consecutive 16-bit mmio reads
into an unaligned 32-bit read will rarely have the intended effect ;-)
Arnd
next prev parent reply other threads:[~2019-07-30 18:24 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-29 20:25 [PATCH] powerpc: workaround clang codegen bug in dcbz Nick Desaulniers
2019-07-29 20:32 ` Nathan Chancellor
2019-07-29 20:45 ` Nick Desaulniers
2019-07-29 20:47 ` Nathan Chancellor
2019-07-29 20:49 ` Nick Desaulniers
2019-07-29 21:52 ` Segher Boessenkool
2019-07-30 7:34 ` Arnd Bergmann
2019-07-30 11:17 ` Michael Ellerman
2019-08-09 18:21 ` [PATCH] powerpc: fix inline asm constraints for dcbz Nick Desaulniers
2019-08-09 18:28 ` Arnd Bergmann
2019-08-09 20:03 ` Christophe Leroy
2019-08-09 20:12 ` Arnd Bergmann
2019-08-09 22:03 ` Nick Desaulniers
2019-08-09 22:10 ` Segher Boessenkool
2019-08-09 22:00 ` Segher Boessenkool
2019-08-09 22:03 ` [PATCH v3] Revert "powerpc: slightly improve cache helpers" Nick Desaulniers
2019-08-10 9:09 ` Michael Ellerman
2019-08-09 21:55 ` [PATCH] powerpc: fix inline asm constraints for dcbz Segher Boessenkool
2019-08-09 20:36 ` Nathan Chancellor
2019-07-30 13:48 ` [PATCH] powerpc: workaround clang codegen bug in dcbz Segher Boessenkool
2019-07-30 14:30 ` Arnd Bergmann
2019-07-30 16:16 ` Segher Boessenkool
2019-07-30 17:07 ` Segher Boessenkool
2019-07-30 18:24 ` Arnd Bergmann
2019-07-30 18:24 ` Arnd Bergmann [this message]
2019-07-30 19:35 ` Segher Boessenkool
2019-07-30 5:31 ` Christophe Leroy
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