From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EA84C433E9 for ; Tue, 9 Mar 2021 12:42:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1B1646529E for ; Tue, 9 Mar 2021 12:42:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230452AbhCIMlw (ORCPT ); Tue, 9 Mar 2021 07:41:52 -0500 Received: from mail.kernel.org ([198.145.29.99]:37536 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229688AbhCIMlg (ORCPT ); Tue, 9 Mar 2021 07:41:36 -0500 Received: by mail.kernel.org (Postfix) with ESMTPSA id 5B0B36529E; Tue, 9 Mar 2021 12:41:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615293696; bh=54A2A0Kb1ZFFWRRdx3zNsT+EhwC/DJL9erZDIQNN0Tc=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=f5aSC4o+8v3PrI4iPCVnAWgNaDDZGLK9h4Bzg7X/GabHGW4e1KC9vwMc4XJjnbjpz 10APnc66VtVVqBKuhZD0l45AjY5/Amgeyb9EVjU3GuYvzrKdRAbui8CFkiOlmlXcTq Hwd/rAArocNDoY8MTTTyVLTSKEYdbZgTSBnJhIawwXoFxP22IEOfD9jiHVOmAoXizI mH/cUOKNXyeXuTqirGA5U/o13O/xTZ7MLZiehSwFLD4LOEsDcgKmxKnEX3Th7l4Lag Nofue4Gm+YIbMEpcGWDYnPOhxBjVs4KoB2CEbu/ttjT4NEa/GqK81zZ3KsvJ1oP7gk aL4o0jzyws89g== Received: by mail-oi1-f169.google.com with SMTP id f3so14719832oiw.13; Tue, 09 Mar 2021 04:41:36 -0800 (PST) X-Gm-Message-State: AOAM532ZJggCknAe8xDN/05dshkh5/PaXRDerObcFqKqg3y2O4JPP/px 4nWXbrMoRTuMb3iCEOUIX/ulMk3bJ97qYGiD/ME= X-Google-Smtp-Source: ABdhPJy6VatYtJ/swndVE4EQRIBHgRqbTjvCoS5T8FjJaiD4ljz4scReuWAj47J+nxN5H5qwFFajcOJ21lkxpBHFnHE= X-Received: by 2002:aca:5e85:: with SMTP id s127mr2704125oib.67.1615293695537; Tue, 09 Mar 2021 04:41:35 -0800 (PST) MIME-Version: 1.0 References: <20210304213902.83903-1-marcan@marcan.st> <20210304213902.83903-13-marcan@marcan.st> <6e4880b3-1fb6-0cbf-c1a5-7a46fd9ccf62@marcan.st> <20210308211306.GA2920998@robh.at.kernel.org> In-Reply-To: From: Arnd Bergmann Date: Tue, 9 Mar 2021 13:41:19 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [RFT PATCH v3 12/27] of/address: Add infrastructure to declare MMIO as non-posted To: Linus Walleij Cc: Rob Herring , Hector Martin , linux-arm-kernel , Marc Zyngier , Olof Johansson , Krzysztof Kozlowski , Mark Kettenis , Tony Lindgren , Mohamed Mediouni , Stan Skowronek , Alexander Graf , Will Deacon , Mark Rutland , Andy Shevchenko , Greg Kroah-Hartman , Jonathan Corbet , Catalin Marinas , Christoph Hellwig , "David S. Miller" , DTML , "open list:SERIAL DRIVERS" , Linux Doc Mailing List , linux-samsung-soc , "open list:GENERIC INCLUDE/ASM HEADER FILES" , "linux-kernel@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 9, 2021 at 12:14 PM Linus Walleij wrote: > > On Mon, Mar 8, 2021 at 10:13 PM Rob Herring wrote: > > On Mon, Mar 08, 2021 at 09:29:54PM +0100, Arnd Bergmann wrote: > > > > This is obviously more work for the drivers, but at least it keeps > > > the common code free of the hack while also allowing drivers to > > > use ioremap_np() intentionally on other platforms. > > > > I don't agree. The problem is within the interconnect. The device and > > its driver are unaware of this. > > If it is possible that a driver needs to use posted access on one > SoC and nonposted on another SoC then clearly the nature > of the access need to be part of the memory access abstraction, > obviously ioremap() one way or another. There are two possible scenarios: - drivers that we already know are shared between apple and other vendors (s3c-serial, pasemi i2c) would need to use nonposted mmio on Apple but can use either one on other platforms. On non-ARM CPUs, the ioremap_np() function might fail when the hardware only supports posted writes. - A driver writer may want to choose between posted and nonposted mmio based on performance considerations: if writes are never serialized, posted writes should always be faster. However, if the driver uses a spinlock to serialize writes, then a nonposted write is likely faster than a posted write followed by a read that serializes the spin_unlock. In this case we want the driver to explicitly pick one over the other, and not have rely on bus specific magic. > Having the driver conditionally use different ioremap_* > functions depending on SoC seems awkward. We had different > execution paths for OF and ACPI drivers and have been working > hard to create fwnode to abstract this away for drivers used with > both abstractions for example. If we can hide it from drivers > from day 1 I think we can save maintenance costs in the long > run. > > Given that the Apple silicon through it's heritage from Samsung > S3C (the genealogy is unclear to me) already share drivers with > this platform, this seems to already be the case so it's not a > theoretical use case. As far as I can tell, there are only a handful of soc specific drivers that are actually shared with other platforms. Aside from serial and i2c, these are the ones that I can see being shared: - there is an on-chip nvme host controller that is not PCI. So far, nobody else does this, but it can clearly happen in the future - I think one of the USB controllers is a standard designware part, while the others are PCI devices. - The PCI host bridge may be close enough to the standard that we can use the generic driver for config space access. Arnd