From: Arnd Bergmann <arnd@arndb.de>
To: Jeffrey Hugo <jhugo@codeaurora.org>
Cc: gregkh <gregkh@linuxfoundation.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
wufan@codeaurora.org, pratanan@codeaurora.org,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH 5/8] qaic: Implement data path
Date: Thu, 14 May 2020 23:36:27 +0200 [thread overview]
Message-ID: <CAK8P3a34ks226S9UJMfCNdY3KWiBS+vscYdKwLW7wkLj0H_4Cw@mail.gmail.com> (raw)
In-Reply-To: <1589465266-20056-6-git-send-email-jhugo@codeaurora.org>
On Thu, May 14, 2020 at 4:09 PM Jeffrey Hugo <jhugo@codeaurora.org> wrote:
>
> +struct dbc_req { /* everything must be little endian encoded */
Instead of the comment, I suppose you want to use __le16 and __le32
types and let sparse check that you got it right.
> + u16 req_id;
> + u8 seq_id;
> + u8 cmd;
> + u32 resv;
> + u64 src_addr;
> + u64 dest_addr;
> + u32 len;
> + u32 resv2;
> + u64 db_addr; /* doorbell address */
> + u8 db_len; /* not a raw value, special encoding */
> + u8 resv3;
> + u16 resv4;
> + u32 db_data;
> + u32 sem_cmd0;
> + u32 sem_cmd1;
> + u32 sem_cmd2;
> + u32 sem_cmd3;
> +} __packed;
All members are naturally aligned, so better drop the __packed
annotation get better code, unless the structure itself is
at an unaligned offset in memory.
> +struct dbc_rsp { /* everything must be little endian encoded */
> + u16 req_id;
> + u16 status;
> +} __packed;
Same here.
> + init_completion(&mem->xfer_done);
> + list_add_tail(&mem->list, &dbc->xfer_list);
> + tail = (tail + mem->nents) % dbc->nelem;
> + __raw_writel(cpu_to_le32(tail), dbc->dbc_base + REQTP_OFF);
What is this __raw accessor for? This generally results in non-portable
code that should be replaced with writel() or something specific to
the bus on the architecture you deal with.
> + spin_lock_irqsave(&qdev->dbc[exec->dbc_id].xfer_lock, flags);
> + req_id = qdev->dbc[exec->dbc_id].next_req_id++;
> + queued = mem->queued;
> + mem->queued = true;
> + spin_unlock_irqrestore(&qdev->dbc[exec->dbc_id].xfer_lock, flags);
No need for 'irqsave' locks when you know that interrupts are enabled.
> + head = le32_to_cpu(__raw_readl(dbc->dbc_base + RSPHP_OFF));
> + tail = le32_to_cpu(__raw_readl(dbc->dbc_base + RSPTP_OFF));
More __raw accessors to replace.
> + case QAIC_IOCTL_MEM_NR:
> + if (_IOC_DIR(cmd) != (_IOC_READ | _IOC_WRITE) ||
> + _IOC_SIZE(cmd) != sizeof(struct qaic_mem_req)) {
> + ret = -EINVAL;
> + break;
This looks like a very verbose way to check 'cmd' against a known
constant. Why not use 'switch (cmd)' like all other drivers?
Arnd
next prev parent reply other threads:[~2020-05-14 21:36 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-14 14:07 [RFC PATCH 0/8] Qualcomm Cloud AI 100 driver Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 1/8] qaic: Add skeleton driver Jeffrey Hugo
2020-05-15 0:43 ` Jeffrey Hugo
2020-05-15 6:37 ` Greg KH
2020-05-14 14:07 ` [RFC PATCH 2/8] qaic: Add and init a basic mhi controller Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 3/8] qaic: Create char dev Jeffrey Hugo
2020-05-14 14:12 ` Greg KH
2020-05-14 15:05 ` Jeffrey Hugo
2020-05-14 15:56 ` Greg KH
2020-05-14 16:24 ` Jeffrey Hugo
2020-05-15 21:08 ` Jeffrey Hugo
2020-05-16 7:01 ` Greg KH
2020-05-16 21:29 ` Jeffrey Hugo
2020-05-17 7:14 ` Greg KH
2020-05-17 19:37 ` Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 4/8] qaic: Implement control path Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 5/8] qaic: Implement data path Jeffrey Hugo
2020-05-14 14:14 ` Greg KH
2020-05-14 15:06 ` Jeffrey Hugo
2020-05-14 15:56 ` Greg KH
2020-05-14 16:12 ` Jeffrey Hugo
2020-05-14 16:37 ` Greg KH
2020-05-14 16:45 ` Jeffrey Hugo
2020-05-14 21:36 ` Arnd Bergmann [this message]
2020-05-14 22:06 ` Jeffrey Hugo
2020-05-14 22:20 ` Arnd Bergmann
2020-05-14 14:07 ` [RFC PATCH 6/8] qaic: Implement PCI link status error handlers Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 7/8] qaic: Implement MHI error status handler Jeffrey Hugo
2020-05-14 14:07 ` [RFC PATCH 8/8] MAINTAINERS: Add entry for QAIC driver Jeffrey Hugo
2020-05-19 5:08 ` [RFC PATCH 0/8] Qualcomm Cloud AI 100 driver Dave Airlie
2020-05-19 14:57 ` Jeffrey Hugo
2020-05-19 17:41 ` Greg Kroah-Hartman
2020-05-19 18:07 ` Jeffrey Hugo
2020-05-19 18:12 ` Greg Kroah-Hartman
2020-05-19 18:26 ` Jeffrey Hugo
2020-05-20 5:32 ` Greg Kroah-Hartman
2020-05-19 17:33 ` Greg Kroah-Hartman
2020-05-19 6:57 ` Manivannan Sadhasivam
2020-05-19 14:16 ` Jeffrey Hugo
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