From: Arnd Bergmann <arnd@arndb.de>
To: Alex Elder <elder@linaro.org>
Cc: David Miller <davem@davemloft.net>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
syadagir@codeaurora.org, mjavid@codeaurora.org,
evgreen@chromium.org, Ben Chan <benchan@google.com>,
Eric Caruso <ejcaruso@google.com>,
abhishek.esse@gmail.com,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 09/18] soc: qcom: ipa: GSI transactions
Date: Fri, 17 May 2019 20:33:37 +0200 [thread overview]
Message-ID: <CAK8P3a37bPRZTHZcrg8KrYRLAhCr9pk8v4yuo_wSyUONs2OysQ@mail.gmail.com> (raw)
In-Reply-To: <14a040b6-8187-3fbc-754d-2e267d587858@linaro.org>
On Fri, May 17, 2019 at 8:08 PM Alex Elder <elder@linaro.org> wrote:
>
> On 5/15/19 2:34 AM, Arnd Bergmann wrote:
> >> +static void gsi_trans_tre_fill(struct gsi_tre *dest_tre, dma_addr_t addr,
> >> + u32 len, bool last_tre, bool bei,
> >> + enum ipa_cmd_opcode opcode)
> >> +{
> >> + struct gsi_tre tre;
> >> +
> >> + tre.addr = cpu_to_le64(addr);
> >> + tre.len_opcode = gsi_tre_len_opcode(opcode, len);
> >> + tre.reserved = 0;
> >> + tre.flags = gsi_tre_flags(last_tre, bei, opcode);
> >> +
> >> + *dest_tre = tre; /* Write TRE as a single (16-byte) unit */
> >> +}
> > Have you checked that the atomic write is actually what happens here,
> > but looking at the compiler output? You might need to add a 'volatile'
> > qualifier to the dest_tre argument so the temporary structure doesn't
> > get optimized away here.
>
> Currently, the assignment *does* become a "stp" instruction.
> But I don't know that we can *force* the compiler to write it
> as a pair of registers, so I'll soften the comment with
> "Attempt to write" or something similar.
>
> To my knowledge, adding a volatile qualifier only prevents the
> compiler from performing funny optimizations, but that has no
> effect on whether the 128-bit assignment is made as a single
> unit. Do you know otherwise?
I don't think it you can force the 128-bit assignment to be
atomic, but marking 'dest_tre' should serve to prevent a
specific optimization that replaces the function with
dest_tre->addr = ...
dest_tre->len_opcode = ...
dest_tre->reserved = ...
dest_tre->flags = ...
which it might find more efficient than the stp and is equivalent
when the pointer is not marked volatile. We also have the WRITE_ONCE()
macro that can help prevent this, but it does not work reliably beyond
64 bit assignments.
Arnd
next prev parent reply other threads:[~2019-05-17 18:33 UTC|newest]
Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-12 1:24 [PATCH 00/18] net: introduce Qualcomm IPA driver Alex Elder
2019-05-12 1:24 ` [PATCH 01/18] bitfield.h: add FIELD_MAX() and field_max() Alex Elder
2019-05-12 6:33 ` Kalle Valo
2019-05-12 12:18 ` Alex Elder
2019-05-12 19:30 ` Johannes Berg
2019-05-12 1:24 ` [PATCH 02/18] soc: qcom: create "include/soc/qcom/rmnet.h" Alex Elder
2019-05-12 2:34 ` Joe Perches
2019-05-12 12:15 ` Alex Elder
2019-05-15 6:59 ` Arnd Bergmann
2019-05-15 12:03 ` Alex Elder
2019-05-16 1:09 ` Subash Abhinov Kasiviswanathan
2019-05-17 17:27 ` Alex Elder
2019-05-17 18:08 ` Subash Abhinov Kasiviswanathan
2019-05-19 17:37 ` Alex Elder
2019-05-12 1:24 ` [PATCH 03/18] dt-bindings: soc: qcom: add IPA bindings Alex Elder
2019-05-15 7:03 ` Arnd Bergmann
2019-05-15 12:04 ` Alex Elder
2019-05-15 16:50 ` Rob Herring
2019-05-15 17:05 ` Alex Elder
2019-05-12 1:24 ` [PATCH 04/18] soc: qcom: ipa: main code Alex Elder
2019-05-12 1:24 ` [PATCH 05/18] soc: qcom: ipa: configuration data Alex Elder
2019-05-12 1:24 ` [PATCH 06/18] soc: qcom: ipa: clocking, interrupts, and memory Alex Elder
2019-05-12 1:24 ` [PATCH 07/18] soc: qcom: ipa: GSI headers Alex Elder
2019-05-12 1:24 ` [PATCH 08/18] soc: qcom: ipa: the generic software interface Alex Elder
2019-05-15 7:21 ` Arnd Bergmann
2019-05-15 12:13 ` Alex Elder
2019-05-15 12:40 ` Arnd Bergmann
2019-05-15 10:47 ` Arnd Bergmann
2019-05-15 13:32 ` Alex Elder
2019-05-15 19:37 ` Arnd Bergmann
2019-05-12 1:24 ` [PATCH 09/18] soc: qcom: ipa: GSI transactions Alex Elder
2019-05-15 7:34 ` Arnd Bergmann
2019-05-15 12:25 ` Alex Elder
2019-05-15 20:50 ` Arnd Bergmann
2019-05-17 18:08 ` Alex Elder
2019-05-17 18:33 ` Arnd Bergmann [this message]
2019-05-17 18:44 ` Alex Elder
2019-05-19 17:11 ` Alex Elder
2019-05-20 9:25 ` Arnd Bergmann
2019-05-20 12:50 ` Alex Elder
2019-05-20 14:43 ` Arnd Bergmann
2019-05-20 14:44 ` Alex Elder
2019-05-20 16:34 ` Evan Green
2019-05-20 16:50 ` Alex Elder
2019-05-20 17:36 ` Evan Green
2019-05-12 1:25 ` [PATCH 10/18] soc: qcom: ipa: IPA interface to GSI Alex Elder
2019-05-12 1:25 ` [PATCH 11/18] soc: qcom: ipa: IPA endpoints Alex Elder
2019-05-12 1:25 ` [PATCH 12/18] soc: qcom: ipa: immediate commands Alex Elder
2019-05-15 8:16 ` Arnd Bergmann
2019-05-15 12:35 ` Alex Elder
2019-05-18 0:34 ` Alex Elder
2019-05-20 14:50 ` Arnd Bergmann
2019-05-20 14:55 ` Alex Elder
2019-05-20 17:35 ` Christoph Hellwig
2019-05-12 1:25 ` [PATCH 13/18] soc: qcom: ipa: IPA network device and microcontroller Alex Elder
2019-05-15 8:21 ` Arnd Bergmann
2019-05-15 12:46 ` Alex Elder
2019-05-12 1:25 ` [PATCH 14/18] soc: qcom: ipa: AP/modem communications Alex Elder
2019-05-12 1:25 ` [PATCH 15/18] soc: qcom: ipa: support build of IPA code Alex Elder
2019-05-12 1:25 ` [PATCH 16/18] MAINTAINERS: add entry for the Qualcomm IPA driver Alex Elder
2019-05-12 1:25 ` [PATCH 17/18] arm64: dts: sdm845: add IPA information Alex Elder
2019-05-12 1:25 ` [PATCH 18/18] arm64: defconfig: enable build of IPA code Alex Elder
2019-05-15 8:23 ` Arnd Bergmann
2019-05-15 12:49 ` Alex Elder
2019-05-15 12:37 ` [PATCH 00/18] net: introduce Qualcomm IPA driver Arnd Bergmann
2019-05-15 12:52 ` Alex Elder
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