From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751454AbdKHIyb (ORCPT ); Wed, 8 Nov 2017 03:54:31 -0500 Received: from mail-ot0-f194.google.com ([74.125.82.194]:50253 "EHLO mail-ot0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750735AbdKHIy1 (ORCPT ); Wed, 8 Nov 2017 03:54:27 -0500 X-Google-Smtp-Source: AGs4zMZPQewqwSPK0vutYknB2gNilnXd01yym4pgCl2kBZkeX1hn80/znh5C3779lWw8BYo+SZkmpJpdGon3db//bH8= MIME-Version: 1.0 In-Reply-To: References: From: Arnd Bergmann Date: Wed, 8 Nov 2017 09:54:25 +0100 X-Google-Sender-Auth: ygcutl3lZkDlxU3gL3E3yaiqwFA Message-ID: Subject: Re: [PATCH 11/31] nds32: Atomic operations To: Greentime Hu Cc: greentime@andestech.com, Linux Kernel Mailing List , linux-arch , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Networking , Vincent Chen , Palmer Dabbelt Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 8, 2017 at 6:54 AM, Greentime Hu wrote: > From: Greentime Hu > > Signed-off-by: Vincent Chen > Signed-off-by: Greentime Hu > --- > arch/nds32/include/asm/futex.h | 116 ++++++++++++++++++++++++ > arch/nds32/include/asm/spinlock.h | 178 +++++++++++++++++++++++++++++++++++++ > 2 files changed, 294 insertions(+) > create mode 100644 arch/nds32/include/asm/futex.h > create mode 100644 arch/nds32/include/asm/spinlock.h > diff --git a/arch/nds32/include/asm/spinlock.h b/arch/nds32/include/asm/spinlock.h > new file mode 100644 > index 0000000..dd5fc71 > --- /dev/null > +++ b/arch/nds32/include/asm/spinlock.h > @@ -0,0 +1,178 @@ > + > +#define arch_spin_unlock_wait(lock) \ > + do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0) This was removed from the other architectures in commit 952111d7db02 ("arch: Remove spin_unlock_wait() arch-specific definitions") Please remove this as well. Palmer, I see riscv has the same thing, please also add a patch to your tree to remove it. > +#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) > + > +static inline void arch_spin_lock(arch_spinlock_t * lock) > +{ > + unsigned long tmp; > + > + __asm__ __volatile__("1:\n" > + "\tllw\t%0, [%1]\n" > + "\tbnez\t%0, 1b\n" > + "\tmovi\t%0, #0x1\n" > + "\tscw\t%0, [%1]\n" > + "\tbeqz\t%0, 1b\n" > + :"=&r"(tmp) > + :"r"(&lock->lock) > + :"memory"); The coding style seems inconsistent here, the other inline asm uses real tabs instead of \t, and 'asm volatile' is generally preferred over '__asm__ __volatile__'. Arnd