From: Brad Larson <brad@pensando.io>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
Arnd Bergmann <arnd@arndb.de>,
Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Mark Brown <broonie@kernel.org>,
Serge Semin <fancer.lancer@gmail.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Olof Johansson <olof@lixom.net>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
linux-spi <linux-spi@vger.kernel.org>,
linux-mmc <linux-mmc@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control
Date: Sun, 22 Aug 2021 18:10:16 -0700 [thread overview]
Message-ID: <CAK9rFnxgdyxM11n6PaqG_phuDMXnHYWSm+Xaqg89dMYCF3CN8g@mail.gmail.com> (raw)
In-Reply-To: <CAHp75VcG9KajNpDbewDq7QzotB6t7MfwiGk15FaobX+cmMVSzg@mail.gmail.com>
Hi Andy,
On Sun, Mar 7, 2021 at 11:21 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>
> On Thu, Mar 4, 2021 at 4:40 PM Brad Larson <brad@pensando.io> wrote:
> >
> > This GPIO driver is for the Pensando Elba SoC which
> > provides control of four chip selects on two SPI busses.
>
> I will try to avoid repeating otheris in their reviews, but my comments below.
>
> ...
>
> > +config GPIO_ELBA_SPICS
> > + bool "Pensando Elba SPI chip-select"
>
> Can't it be a module? Why?
>
> > + depends on ARCH_PENSANDO_ELBA_SOC
> > + help
> > + Say yes here to support the Pensndo Elba SoC SPI chip-select driver
>
> Please give more explanation what it is and why users might need it,
> and also tell users how the module will be named (if there is no
> strong argument why it can't be a module).
>
> ...
>
> > +#include <linux/of.h>
>
> It's not used here, but you missed mod_devicetable.h.
Based on the feedback I realized this should not be a loadable module.
I should be using builtin_platform_driver(elba_spics_driver).
Currently I have this for gpio/Kconfig
config GPIO_ELBA_SPICS
def_bool y
depends on ARCH_PENSANDO_ELBA_SOC || COMPILE_TEST
> > +/*
> > + * pin: 3 2 | 1 0
> > + * bit: 7------6------5------4----|---3------2------1------0
> > + * cs1 cs1_ovr cs0 cs0_ovr | cs1 cs1_ovr cs0 cs0_ovr
> > + * ssi1 | ssi0
> > + */
> > +#define SPICS_PIN_SHIFT(pin) (2 * (pin))
> > +#define SPICS_MASK(pin) (0x3 << SPICS_PIN_SHIFT(pin))
>
> > +#define SPICS_SET(pin, val) ((((val) << 1) | 0x1) << SPICS_PIN_SHIFT(pin))
>
> Isn't it easier to define as ((value) << (2 * (pin) + 1) | BIT(2 * (pin)))
Both are functionally correct. I don't have a preference, do you want
this change?
> > +struct elba_spics_priv {
> > + void __iomem *base;
> > + spinlock_t lock;
>
> > + struct gpio_chip chip;
>
> If you put it as a first member a container_of() becomes a no-op. OTOH
> dunno if there is any such container_of() use in the code.
There is no use of container_of() for this structure
> > +static int elba_spics_get_value(struct gpio_chip *chip, unsigned int pin)
> > +{
> > + return -ENXIO;
>
> Hmm... Is it really acceptable error code here?
No it's not, thanks. Changed to -ENOTSUPP as gpio output direction
only is supported.
> > +static int elba_spics_direction_input(struct gpio_chip *chip, unsigned int pin)
> > +{
> > + return -ENXIO;
>
> Ditto.
Changed to ENOTSUPP
> > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> > + p->base = devm_ioremap_resource(&pdev->dev, res);
>
> p->base = devm_platform_ioremap_resource(pdev, 0);
Changed to single call to devm_platform_ioremap_resource(pdev, 0)
> > + if (IS_ERR(p->base)) {
>
> > + dev_err(&pdev->dev, "failed to remap I/O memory\n");
>
> Duplicate noisy message.
Removed extra log message
> > + return PTR_ERR(p->base);
> > + }
>
> > + ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p);
> > + if (ret) {
> > + dev_err(&pdev->dev, "unable to add gpio chip\n");
>
> > + return ret;
> > + }
> > +
> > + dev_info(&pdev->dev, "elba spics registered\n");
> > + return 0;
>
> if (ret)
> dev_err(...);
> return ret;
Yes, made this change and will include in v3 patchset
--- a/drivers/gpio/gpio-elba-spics.c
+++ b/drivers/gpio/gpio-elba-spics.c
@@ -91,13 +91,9 @@ static int elba_spics_probe(struct platform_device *pdev)
ret = devm_gpiochip_add_data(&pdev->dev, &p->chip, p);
- if (ret) {
+ if (ret)
dev_err(&pdev->dev, "unable to add gpio chip\n");
- return ret;
- }
-
- dev_info(&pdev->dev, "elba spics registered\n");
- return 0;
+ return ret;
Regards,
Brad
next prev parent reply other threads:[~2021-08-23 1:10 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-04 3:41 [PATCH 0/8] Support Pensando Elba SoC Brad Larson
2021-03-04 3:41 ` [PATCH 1/8] gpio: Add Elba SoC gpio driver for spi cs control Brad Larson
2021-03-04 8:29 ` Linus Walleij
2021-03-04 9:10 ` Serge Semin
2021-03-04 13:38 ` Linus Walleij
2021-08-23 1:05 ` Brad Larson
2021-08-29 21:09 ` Linus Walleij
2021-10-04 16:46 ` Brad Larson
2021-10-12 23:51 ` Linus Walleij
2021-10-14 20:06 ` Brad Larson
2021-03-30 2:44 ` Brad Larson
2021-08-23 1:05 ` Brad Larson
2021-03-04 20:43 ` Elliott, Robert (Servers)
2021-08-23 1:06 ` Brad Larson
2021-03-05 11:25 ` Krzysztof Kozlowski
2021-08-23 1:07 ` Brad Larson
2021-03-05 13:57 ` Geert Uytterhoeven
2021-08-23 1:08 ` Brad Larson
2021-03-07 19:21 ` Andy Shevchenko
2021-03-29 1:19 ` Brad Larson
2021-03-29 10:39 ` Andy Shevchenko
2021-08-23 1:13 ` Brad Larson
2021-08-23 7:50 ` Geert Uytterhoeven
2021-08-23 16:30 ` Brad Larson
2021-08-23 20:11 ` Geert Uytterhoeven
2021-10-04 17:14 ` Brad Larson
2021-10-04 17:16 ` Geert Uytterhoeven
2021-08-23 1:10 ` Brad Larson [this message]
2021-03-04 3:41 ` [PATCH 2/8] spi: cadence-quadspi: Add QSPI support for Pensando Elba SoC Brad Larson
2021-03-04 9:29 ` Arnd Bergmann
2021-03-04 3:41 ` [PATCH 3/8] spi: dw: Add support for Pensando Elba SoC SPI Brad Larson
2021-03-04 6:44 ` Serge Semin
2021-08-23 1:17 ` Brad Larson
2021-03-04 8:48 ` Linus Walleij
2021-03-10 3:52 ` Brad Larson
2021-03-04 3:41 ` [PATCH 4/8] spidev: Add Pensando CPLD compatible Brad Larson
2021-03-04 9:33 ` Arnd Bergmann
2021-03-04 3:41 ` [PATCH 5/8] mmc: sdhci-cadence: Add Pensando Elba SoC support Brad Larson
2021-03-04 9:41 ` Arnd Bergmann
2021-03-04 3:41 ` [PATCH 6/8] arm64: Add config for Pensando SoC platforms Brad Larson
2021-03-04 9:42 ` Arnd Bergmann
2021-03-04 3:41 ` [PATCH 7/8] arm64: dts: Add Pensando Elba SoC support Brad Larson
2021-03-04 8:03 ` Serge Semin
2021-03-29 1:07 ` Brad Larson
2021-08-23 0:54 ` Brad Larson
2021-03-04 8:51 ` Linus Walleij
2021-03-29 0:54 ` Brad Larson
2021-03-04 9:06 ` Arnd Bergmann
2021-03-04 20:47 ` Rob Herring
2021-03-05 11:22 ` Krzysztof Kozlowski
2021-03-04 3:41 ` [PATCH 8/8] MAINTAINERS: Add entry for PENSANDO Brad Larson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAK9rFnxgdyxM11n6PaqG_phuDMXnHYWSm+Xaqg89dMYCF3CN8g@mail.gmail.com \
--to=brad@pensando.io \
--cc=adrian.hunter@intel.com \
--cc=andy.shevchenko@gmail.com \
--cc=arnd@arndb.de \
--cc=bgolaszewski@baylibre.com \
--cc=broonie@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=fancer.lancer@gmail.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=olof@lixom.net \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).