From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1167729AbdDYLvR (ORCPT ); Tue, 25 Apr 2017 07:51:17 -0400 Received: from mail-pg0-f42.google.com ([74.125.83.42]:36803 "EHLO mail-pg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1947187AbdDYLvJ (ORCPT ); Tue, 25 Apr 2017 07:51:09 -0400 MIME-Version: 1.0 In-Reply-To: References: <20140625103445.GA12943@avagotech.com> From: Sreekanth Reddy Date: Tue, 25 Apr 2017 17:21:07 +0530 Message-ID: Subject: Re: [RESEND][PATCH 07/10][SCSI]mpt2sas: Added Reply Descriptor Post Queue (RDPQ) Array support To: "Martin K. Petersen" Cc: "jejb@kernel.org" , "linux-scsi@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Christoph Hellwig Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 24, 2014 at 1:16 AM, Martin K. Petersen wrote: >>>>>> "Sreekanth" == Sreekanth Reddy writes: > > Sreekanth, > > Sreekanth> 2. As per MPI Spec, each set of 8 reply descriptor post > Sreekanth> queues must have the same value for the upper 32-bits of > Sreekanth> their memory address. So allocated set of eight queues in a > Sreekanth> single pool and added a new function is_MSB_are_same() to > Sreekanth> check whether higher 32 bits of this pool memory address are > Sreekanth> same or not. If this functions returns zero then we are > Sreekanth> saving these pools in the bad_reply_post_pool list. then > Sreekanth> releasing these pools once we get the required memory pools. > > Why don't you just set pci_set_consistent_dma_mask() to DMA_BIT_MASK(32) > before you allocate the queue entries? Martin, I am taking out this old mail to find out is their any other better way to make sure that allocated DMA pool doesn't cross particular boundary line (in our case all upper 32 bits of this pool should be same, i.e. all the buffer from the pool should be within the 4GB boundary). We need to satisfy this condition on those system where 32 bit dma consistent mask is not supported and it only supports 64 bit dma consistent mask. So on these system we can't set pci_set_consistent_dma_mask() to DMA_BIT_MASK(32). Thanks, Sreekanth > > -- > Martin K. Petersen Oracle Linux Engineering