From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751935AbbHBH1L (ORCPT ); Sun, 2 Aug 2015 03:27:11 -0400 Received: from mail-pa0-f54.google.com ([209.85.220.54]:33841 "EHLO mail-pa0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751611AbbHBH1J (ORCPT ); Sun, 2 Aug 2015 03:27:09 -0400 MIME-Version: 1.0 In-Reply-To: <1436437661-17606-1-git-send-email-pi-cheng.chen@linaro.org> References: <1436437661-17606-1-git-send-email-pi-cheng.chen@linaro.org> Date: Sun, 2 Aug 2015 12:57:08 +0530 Message-ID: Subject: Re: [PATCH v6 0/4] Add Mediatek MT8173 cpufreq driver From: Viresh Kumar To: Pi-Cheng Chen , "Rafael J. Wysocki" Cc: Michael Turquette , Matthias Brugger , Mark Rutland , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Linux Kernel Mailing List , "linux-pm@vger.kernel.org" , Linaro Kernel Mailman List , linux-mediatek@lists.infradead.org Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 9 July 2015 at 15:57, Pi-Cheng Chen wrote: > MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster > share the same power and clock domain. This series tries to add cpufreq support > for MT8173 SoC. > > changes in v6: > - Move clock and regulator consumer properties document to the device tree > bindings documents of MT8173 CPU DVFS clock driver > - Add change log to describe what is implemented in the MT8173 cpufreq driver > - Add missed rcu_read_unlock() in the error path > - Move of_init_opp_table() call to make sure all required hardware resources > are already there before it is called > - Add comments to describe why both platform driver and deivce registration > codes are put in the initcall function > - Use the term "voltage tracking" instead of "voltage trace" according to an > internal SoC document > @Rafael: Can you please apply these patches [1,3,4] for 4.3?