From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752746AbbCJCus (ORCPT ); Mon, 9 Mar 2015 22:50:48 -0400 Received: from mail-oi0-f46.google.com ([209.85.218.46]:39851 "EHLO mail-oi0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751582AbbCJCuo (ORCPT ); Mon, 9 Mar 2015 22:50:44 -0400 MIME-Version: 1.0 In-Reply-To: References: <1425458956-20665-1-git-send-email-pi-cheng.chen@linaro.org> <1425458956-20665-4-git-send-email-pi-cheng.chen@linaro.org> Date: Tue, 10 Mar 2015 08:20:43 +0530 Message-ID: Subject: Re: [PATCH v2 3/4] cpufreq: mediatek: add Mediatek cpufreq driver From: Viresh Kumar To: Pi-Cheng Chen , Mark Brown Cc: Matthias Brugger , Rob Herring , "Rafael J. Wysocki" , Thomas Petazzoni , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Catalin Marinas , Will Deacon , "Joe.C" , Eddie Huang , Howard Chen , Ashwin Chaugule , Mike Turquette , Chen Fan , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Linux Kernel Mailing List , "linux-pm@vger.kernel.org" , Linaro Kernel Mailman List , linux-mediatek@lists.infradead.org, Sascha Hauer Content-Type: text/plain; charset=UTF-8 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6 March 2015 at 11:19, Pi-Cheng Chen wrote: > On 5 March 2015 at 17:55, Viresh Kumar wrote: > About putting > those stuff into regulator driver, I think you mean creating a > "virtual regulator > device" and put all the voltage controlling complex into the driver, right? > Maybe it's a good idea in this case, but I am sure if this kind of > virtual regulator is acceptable. @Mark: Is this allowed to create virtual regulator for a CPU ? > And the flexibility might be an issue, since we might > use different > PMIC for same SoC on different board. We can talk about that separately once Mark replies to my query. > Combining comments and suggestions from you and Sascha[1], I conclude some > architectural changes are going to be made in the next version: > > 1. Use set_rate hook instead of determine_rate in clk driver, and > switch to intermeidate > PLL parent and back to original CPU PLL parent explicitly in set_rate Lets wait for Russell's answer to the query I posted before making any progress here.