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Date: Thu, 5 Mar 2015 14:29:50 +0530
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Subject: Re: [PATCH] clk: mediatek: Export CPU mux clocks for CPU frequency control
From: Viresh Kumar <viresh.kumar@linaro.org>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pi-Cheng Chen <pi-cheng.chen@linaro.org>,
        Mike Turquette <mturquette@linaro.org>,
        Stephen Boyd <sboyd@codeaurora.org>,
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        Mark Rutland <mark.rutland@arm.com>,
        Ian Campbell <ijc+devicetree@hellion.org.uk>,
        Kumar Gala <galak@codeaurora.org>,
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        James Liao <jamesjj.liao@mediatek.com>,
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On 5 March 2015 at 13:12, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> We have clk_set_parent for changing the parent and clk_set_rate to
> change the rate. Use the former for changing the parent and the latter
> for changing the rate. What you are interested in is changing the
> parent, so use clk_set_parent for this and not abuse a side effect
> of clk_set_rate.

clk_set_rate() for CPUs clock is responsible to change clock rate
of the CPU. Whether it plays with PLLs or muxes, its not that relevant.

> My suggestion is to take another approach. Implement clk_set_rate for
> these muxes and in the set_rate hook:
>
> - switch mux to intermediate PLL parent
> - call clk_set_rate() for the real parent PLL
> - switch mux back to real parent PLL
>
> This way the things happening behind the scenes are completely transparent
> to the cpufreq driver and you can use cpufreq-dt as is without changes.

CPUFreq wants to change to intermediate frequency by itself against
some magic change behind the scene. The major requirement for that
comes from the fact that we want to send PRE/POST freq notifiers on
which loops-per-jiffie depends.